drivers/misc/amd-sbi/rmi-i2c.c
Source file repositories/reference/linux-study-clean/drivers/misc/amd-sbi/rmi-i2c.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/misc/amd-sbi/rmi-i2c.c- Extension
.c- Size
- 6329 bytes
- Lines
- 248
- Domain
- Driver Families
- Bucket
- drivers/misc
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/delay.hlinux/err.hlinux/i2c.hlinux/i3c/device.hlinux/i3c/master.hlinux/init.hlinux/module.hlinux/mutex.hlinux/of.hlinux/regmap.hrmi-core.h
Detected Declarations
function Copyrightfunction sbrmi_get_max_pwr_limitfunction sbrmi_common_probefunction sbrmi_i2c_probefunction sbrmi_i2c_removefunction sbrmi_i3c_probefunction sbrmi_i3c_remove
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* rmi-i2c.c - Side band RMI over I2C support for AMD out
* of band management
*
* Copyright (C) 2024 Advanced Micro Devices, Inc.
*/
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/i3c/device.h>
#include <linux/i3c/master.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/of.h>
#include <linux/regmap.h>
#include "rmi-core.h"
#define REV_TWO_BYTE_ADDR 0x21
static int sbrmi_enable_alert(struct sbrmi_data *data)
{
int ctrl, ret;
/*
* Enable the SB-RMI Software alert status
* by writing 0 to bit 4 of Control register(0x1)
*/
ret = regmap_read(data->regmap, SBRMI_CTRL, &ctrl);
if (ret < 0)
return ret;
if (ctrl & 0x10) {
ctrl &= ~0x10;
return regmap_write(data->regmap, SBRMI_CTRL, ctrl);
}
return 0;
}
static int sbrmi_get_max_pwr_limit(struct sbrmi_data *data)
{
struct apml_mbox_msg msg = { 0 };
int ret;
msg.cmd = SBRMI_READ_PKG_MAX_PWR_LIMIT;
ret = rmi_mailbox_xfer(data, &msg);
if (ret < 0)
return ret;
data->pwr_limit_max = msg.mb_in_out;
return ret;
}
static int sbrmi_common_probe(struct device *dev, struct regmap *regmap, uint8_t address)
{
struct sbrmi_data *data;
int ret;
data = devm_kzalloc(dev, sizeof(struct sbrmi_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->regmap = regmap;
mutex_init(&data->lock);
/* Enable alert for SB-RMI sequence */
ret = sbrmi_enable_alert(data);
if (ret < 0)
return ret;
/* Cache maximum power limit */
ret = sbrmi_get_max_pwr_limit(data);
if (ret < 0)
return ret;
data->dev_static_addr = address;
dev_set_drvdata(dev, data);
ret = create_hwmon_sensor_device(dev, data);
if (ret < 0)
return ret;
return create_misc_rmi_device(data, dev);
}
static struct regmap_config sbrmi_regmap_config = {
.reg_bits = 8,
Annotation
- Immediate include surface: `linux/delay.h`, `linux/err.h`, `linux/i2c.h`, `linux/i3c/device.h`, `linux/i3c/master.h`, `linux/init.h`, `linux/module.h`, `linux/mutex.h`.
- Detected declarations: `function Copyright`, `function sbrmi_get_max_pwr_limit`, `function sbrmi_common_probe`, `function sbrmi_i2c_probe`, `function sbrmi_i2c_remove`, `function sbrmi_i3c_probe`, `function sbrmi_i3c_remove`.
- Atlas domain: Driver Families / drivers/misc.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.