drivers/misc/cardreader/rts5264.h

Source file repositories/reference/linux-study-clean/drivers/misc/cardreader/rts5264.h

File Facts

System
Linux kernel
Corpus path
drivers/misc/cardreader/rts5264.h
Extension
.h
Size
9309 bytes
Lines
286
Domain
Driver Families
Bucket
drivers/misc
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef RTS5264_H
#define RTS5264_H

/*New add*/
#define rts5264_vendor_setting_valid(reg)	((reg) & 0x010000)
#define rts5264_reg_to_aspm(reg) \
	(((~(reg) >> 28) & 0x02) | (((reg) >> 28) & 0x01))
#define rts5264_reg_check_reverse_socket(reg)	((reg) & 0x04)
#define rts5264_reg_check_wp_reverse(reg)		((reg) & 0x8000)
#define rts5264_reg_to_sd30_drive_sel_1v8(reg)	(((reg) >> 22) & 0x03)
#define rts5264_reg_to_sd30_drive_sel_3v3(reg)	(((reg) >> 16) & 0x03)
#define rts5264_reg_to_rtd3(reg)		((reg) & 0x08)

#define RTS5264_AUTOLOAD_CFG0		0xFF7B
#define RTS5264_AUTOLOAD_CFG1		0xFF7C
#define RTS5264_AUTOLOAD_CFG3		0xFF7E
#define RTS5264_AUTOLOAD_CFG4		0xFF7F
#define RTS5264_FORCE_PRSNT_LOW		(1 << 6)
#define RTS5264_AUX_CLK_16M_EN		(1 << 5)
#define RTS5264_F_HIGH_RC_MASK		(1 << 4)
#define RTS5264_F_HIGH_RC_1_6M		(1 << 4)
#define RTS5264_F_HIGH_RC_400K		(0 << 4)

/* SSC_CTL2 0xFC12 */
#define RTS5264_SSC_DEPTH_MASK		0x07
#define RTS5264_SSC_DEPTH_DISALBE	0x00
#define RTS5264_SSC_DEPTH_8M		0x01
#define RTS5264_SSC_DEPTH_4M		0x02
#define RTS5264_SSC_DEPTH_2M		0x03
#define RTS5264_SSC_DEPTH_1M		0x04
#define RTS5264_SSC_DEPTH_512K		0x05
#define RTS5264_SSC_DEPTH_256K		0x06
#define RTS5264_SSC_DEPTH_128K		0x07

#define RTS5264_CARD_CLK_SRC2		0xFC2F
#define RTS5264_REG_BIG_KVCO_A		0x20

/* efuse control register*/
#define RTS5264_EFUSE_CTL		0xFC30
#define RTS5264_EFUSE_ENABLE		0x80
/* EFUSE_MODE: 0=READ 1=PROGRAM */
#define RTS5264_EFUSE_MODE_MASK		0x40
#define RTS5264_EFUSE_PROGRAM		0x40

#define RTS5264_EFUSE_ADDR		0xFC31
#define	RTS5264_EFUSE_ADDR_MASK		0x3F

#define RTS5264_EFUSE_WRITE_DATA	0xFC32
#define RTS5264_EFUSE_READ_DATA		0xFC34

#define RTS5264_SYS_DUMMY_1		0xFC35
#define RTS5264_REG_BIG_KVCO		0x04

/* DMACTL 0xFE2C */
#define RTS5264_DMA_PACK_SIZE_MASK	0x70

#define RTS5264_FW_CFG_INFO2	0xFF52

#define RTS5264_FW_CFG1			0xFF55
#define RTS5264_SYS_CLK_SEL_MCU_CLK	(0x01<<7)
#define RTS5264_CRC_CLK_SEL_MCU_CLK	(0x01<<6)
#define RTS5264_FAKE_MCU_CLOCK_GATING	(0x01<<5)
#define RTS5264_MCU_BUS_SEL_MASK	(0x01<<4)

/* FW status register */
#define RTS5264_FW_STATUS		0xFF56
#define RTS5264_EXPRESS_LINK_FAIL_MASK	(0x01<<7)

/* FW control register */
#define RTS5264_FW_CTL			0xFF5F
#define RTS5264_INFORM_RTD3_COLD	(0x01<<5)

#define RTS5264_REG_FPDCTL		0xFF60

#define RTS5264_REG_LDO12_CFG		0xFF6E
#define RTS5264_LDO12_SR_MASK		(0x03<<6)
#define RTS5264_LDO12_SR_1_0_MS		(0x03<<6)
#define RTS5264_LDO12_SR_0_5_MS		(0x02<<6)
#define RTS5264_LDO12_SR_0_2_5_MS	(0x01<<6)
#define RTS5264_LDO12_SR_0_0_MS		(0x00<<6)
#define RTS5264_LDO12_VO_TUNE_MASK	(0x07<<1)
#define RTS5264_LDO12_115		(0x03<<1)
#define RTS5264_LDO12_120		(0x04<<1)
#define RTS5264_LDO12_125		(0x05<<1)
#define RTS5264_LDO12_130		(0x06<<1)
#define RTS5264_LDO12_135		(0x07<<1)

/* LDO control register */
#define RTS5264_CARD_PWR_CTL		0xFD50
#define RTS5264_SD_CLK_ISO		(0x01<<7)

Annotation

Implementation Notes