drivers/misc/genwqe/card_ddcb.c
Source file repositories/reference/linux-study-clean/drivers/misc/genwqe/card_ddcb.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/misc/genwqe/card_ddcb.c- Extension
.c- Size
- 39059 bytes
- Lines
- 1409
- Domain
- Driver Families
- Bucket
- drivers/misc
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches user memory; correctness depends on fault-safe copying and privilege boundary handling.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hlinux/sched.hlinux/wait.hlinux/pci.hlinux/string.hlinux/dma-mapping.hlinux/delay.hlinux/module.hlinux/interrupt.hlinux/crc-itu-t.hcard_base.hcard_ddcb.h
Detected Declarations
function Blockfunction queue_enqueued_ddcbsfunction queue_free_ddcbsfunction ddcb_mark_tappedfunction ddcb_mark_appendedfunction ddcb_mark_clearedfunction ddcb_mark_finishedfunction ddcb_mark_unusedfunction genwqe_crc16function print_ddcb_infofunction ddcb_requ_freefunction ddcb_requ_get_statefunction ddcb_requ_set_statefunction ddcb_requ_collect_debug_datafunction ddcb_requ_finishedfunction enqueue_ddcbfunction copy_ddcb_resultsfunction genwqe_check_ddcb_queuefunction __genwqe_wait_ddcbfunction get_next_ddcbfunction __genwqe_purge_ddcbfunction genwqe_init_debug_datafunction __genwqe_enqueue_ddcbfunction __genwqe_execute_raw_ddcbfunction genwqe_next_ddcb_readyfunction genwqe_ddcbs_in_flightfunction setup_ddcb_queuefunction ddcb_queue_initializedfunction free_ddcb_queuefunction genwqe_pf_isrfunction genwqe_vf_isrfunction genwqe_card_threadfunction genwqe_setup_service_layerfunction queue_wake_up_allfunction genwqe_finish_queuefunction genwqe_release_service_layer
Annotated Snippet
if (req == NULL) {
/* this occurs if DDCB is purged, not an error */
/* Move active DDCB further; Nothing to do anymore. */
goto pick_next_one;
}
/*
* HSI=0x44 (fetched and completed), but RETC is
* 0x101, or even worse 0x000.
*
* In case of seeing the queue in inconsistent state
* we read the errcnts and the queue status to provide
* a trigger for our PCIe analyzer stop capturing.
*/
retc_16 = be16_to_cpu(pddcb->retc_16);
if ((pddcb->hsi == 0x44) && (retc_16 <= 0x101)) {
u64 errcnts, status;
u64 ddcb_offs = (u64)pddcb - (u64)queue->ddcb_vaddr;
errcnts = __genwqe_readq(cd, queue->IO_QUEUE_ERRCNTS);
status = __genwqe_readq(cd, queue->IO_QUEUE_STATUS);
dev_err(&pci_dev->dev,
"[%s] SEQN=%04x HSI=%02x RETC=%03x Q_ERRCNTS=%016llx Q_STATUS=%016llx DDCB_DMA_ADDR=%016llx\n",
__func__, be16_to_cpu(pddcb->seqnum_16),
pddcb->hsi, retc_16, errcnts, status,
queue->ddcb_daddr + ddcb_offs);
}
copy_ddcb_results(req, queue->ddcb_act);
queue->ddcb_req[queue->ddcb_act] = NULL; /* take from queue */
dev_dbg(&pci_dev->dev, "FINISHED DDCB#%d\n", req->num);
genwqe_hexdump(pci_dev, pddcb, sizeof(*pddcb));
ddcb_mark_finished(pddcb);
/* calculate CRC_16 to see if VCRC is correct */
vcrc = genwqe_crc16(pddcb->asv,
VCRC_LENGTH(req->cmd.asv_length),
0xffff);
vcrc_16 = be16_to_cpu(pddcb->vcrc_16);
if (vcrc != vcrc_16) {
printk_ratelimited(KERN_ERR
"%s %s: err: wrong VCRC pre=%02x vcrc_len=%d bytes vcrc_data=%04x is not vcrc_card=%04x\n",
GENWQE_DEVNAME, dev_name(&pci_dev->dev),
pddcb->pre, VCRC_LENGTH(req->cmd.asv_length),
vcrc, vcrc_16);
}
ddcb_requ_set_state(req, GENWQE_REQU_FINISHED);
queue->ddcbs_completed++;
queue->ddcbs_in_flight--;
/* wake up process waiting for this DDCB, and
processes on the busy queue */
wake_up_interruptible(&queue->ddcb_waitqs[queue->ddcb_act]);
wake_up_interruptible(&queue->busy_waitq);
pick_next_one:
queue->ddcb_act = (queue->ddcb_act + 1) % queue->ddcb_max;
ddcbs_finished++;
}
go_home:
spin_unlock_irqrestore(&queue->ddcb_lock, flags);
return ddcbs_finished;
}
/**
* __genwqe_wait_ddcb(): Waits until DDCB is completed
* @cd: pointer to genwqe device descriptor
* @req: pointer to requsted DDCB parameters
*
* The Service Layer will update the RETC in DDCB when processing is
* pending or done.
*
* Return: > 0 remaining jiffies, DDCB completed
* -ETIMEDOUT when timeout
* -ERESTARTSYS when ^C
* -EINVAL when unknown error condition
*
* When an error is returned the called needs to ensure that
* purge_ddcb() is being called to get the &req removed from the
* queue.
*/
int __genwqe_wait_ddcb(struct genwqe_dev *cd, struct ddcb_requ *req)
{
int rc;
unsigned int ddcb_no;
Annotation
- Immediate include surface: `linux/types.h`, `linux/sched.h`, `linux/wait.h`, `linux/pci.h`, `linux/string.h`, `linux/dma-mapping.h`, `linux/delay.h`, `linux/module.h`.
- Detected declarations: `function Block`, `function queue_enqueued_ddcbs`, `function queue_free_ddcbs`, `function ddcb_mark_tapped`, `function ddcb_mark_appended`, `function ddcb_mark_cleared`, `function ddcb_mark_finished`, `function ddcb_mark_unused`, `function genwqe_crc16`, `function print_ddcb_info`.
- Atlas domain: Driver Families / drivers/misc.
- Implementation status: source implementation candidate.
- This snippet crosses the user/kernel memory boundary; validate fault handling and access checks before translating the pattern.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.