drivers/misc/keba/lan9252.c

Source file repositories/reference/linux-study-clean/drivers/misc/keba/lan9252.c

File Facts

System
Linux kernel
Corpus path
drivers/misc/keba/lan9252.c
Extension
.c
Size
8136 bytes
Lines
360
Domain
Driver Families
Bucket
drivers/misc
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct lan9252_read_cmd {
	u8 cmd;
	u8 addr_0;
	u8 addr_1;
} __packed;

struct lan9252_write_cmd {
	u8 cmd;
	u8 addr_0;
	u8 addr_1;
	u32 data;
} __packed;

/* byte test register */
#define LAN9252_BYTE_TEST		0x64
#define   LAN9252_BYTE_TEST_VALUE	0x87654321

/* hardware configuration register */
#define LAN9252_HW_CFG		0x74
#define   LAN9252_HW_CFG_READY	0x08000000

/* EtherCAT CSR interface data register */
#define LAN9252_ECAT_CSR_DATA	0x300

/* EtherCAT CSR interface command register */
#define LAN9252_ECAT_CSR_CMD	0x304
#define   LAN9252_ECAT_CSR_BUSY	0x80000000
#define   LAN9252_ECAT_CSR_READ	0x40000000

/* EtherCAT slave controller MII register */
#define LAN9252_ESC_MII			0x510
#define   LAN9252_ESC_MII_BUSY		0x8000
#define   LAN9252_ESC_MII_CMD_ERR	0x4000
#define   LAN9252_ESC_MII_READ_ERR	0x2000
#define   LAN9252_ESC_MII_ERR_MASK	(LAN9252_ESC_MII_CMD_ERR | \
					 LAN9252_ESC_MII_READ_ERR)
#define   LAN9252_ESC_MII_WRITE		0x0200
#define   LAN9252_ESC_MII_READ		0x0100

/* EtherCAT slave controller PHY address register */
#define LAN9252_ESC_PHY_ADDR		0x512

/* EtherCAT slave controller PHY register address register */
#define LAN9252_ESC_PHY_REG_ADDR	0x513

/* EtherCAT slave controller PHY data register */
#define LAN9252_ESC_PHY_DATA		0x514

/* EtherCAT slave controller PDI access state register */
#define LAN9252_ESC_MII_PDI		0x517
#define   LAN9252_ESC_MII_ACCESS_PDI	0x01
#define   LAN9252_ESC_MII_ACCESS_ECAT	0x00

/* PHY address */
#define PHY_ADDRESS	2

#define SPI_RETRY_COUNT		10
#define SPI_WAIT_US		100
#define SPI_CSR_WAIT_US		500

static int lan9252_spi_read(struct spi_device *spi, u16 addr, u32 *data)
{
	struct lan9252_read_cmd cmd;

	cmd.cmd = LAN9252_SPI_READ;
	cmd.addr_0 = (addr >> 8) & 0xFF;
	cmd.addr_1 = addr & 0xFF;

	return spi_write_then_read(spi, (u8 *)&cmd,
				   sizeof(struct lan9252_read_cmd),
				   (u8 *)data, sizeof(u32));
}

static int lan9252_spi_write(struct spi_device *spi, u16 addr, u32 data)
{
	struct lan9252_write_cmd cmd;

	cmd.cmd = LAN9252_SPI_WRITE;
	cmd.addr_0 = (addr >> 8) & 0xFF;
	cmd.addr_1 = addr & 0xFF;
	cmd.data = data;

	return spi_write(spi, (u8 *)&cmd, sizeof(struct lan9252_write_cmd));
}

static bool lan9252_init(struct spi_device *spi)
{
	u32 data;
	int ret;

Annotation

Implementation Notes