drivers/misc/mei/hw-me.h

Source file repositories/reference/linux-study-clean/drivers/misc/mei/hw-me.h

File Facts

System
Linux kernel
Corpus path
drivers/misc/mei/hw-me.h
Extension
.h
Size
4723 bytes
Lines
145
Domain
Driver Families
Bucket
drivers/misc
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct mei_cfg {
	const struct mei_fw_status fw_status;
	bool (*quirk_probe)(const struct pci_dev *pdev);
	const char *kind;
	size_t dma_size[DMA_DSCR_NUM];
	u32 fw_ver_supported:1;
	u32 hw_trc_supported:1;
};

#define MEI_ME_RPM_TIMEOUT    500 /* ms */

/**
 * struct mei_me_hw - me hw specific data
 *
 * @cfg: per device generation config and ops
 * @mem_addr: io memory address
 * @irq: irq number
 * @pg_state: power gating state
 * @d0i3_supported: di03 support
 * @hbuf_depth: depth of hardware host/write buffer in slots
 * @read_fws: read FW status register handler
 * @polling_thread: interrupt polling thread
 * @wait_active: the polling thread activity wait queue
 * @is_active: the device is active
 */
struct mei_me_hw {
	const struct mei_cfg *cfg;
	void __iomem *mem_addr;
	int irq;
	enum mei_pg_state pg_state;
	bool d0i3_supported;
	u8 hbuf_depth;
	int (*read_fws)(const struct mei_device *dev, int where, const char *name, u32 *val);
	/* polling */
	struct task_struct *polling_thread;
	wait_queue_head_t wait_active;
	bool is_active;
};

#define to_me_hw(dev) (struct mei_me_hw *)((dev)->hw)

static inline bool mei_me_hw_use_polling(const struct mei_me_hw *hw)
{
	return hw->irq < 0;
}

/**
 * enum mei_cfg_idx - indices to platform specific configurations.
 *
 * Note: has to be synchronized with mei_cfg_list[]
 *
 * @MEI_ME_UNDEF_CFG:      Lower sentinel.
 * @MEI_ME_ICH_CFG:        I/O Controller Hub legacy devices.
 * @MEI_ME_ICH10_CFG:      I/O Controller Hub platforms Gen10
 * @MEI_ME_PCH6_CFG:       Platform Controller Hub platforms (Gen6).
 * @MEI_ME_PCH7_CFG:       Platform Controller Hub platforms (Gen7).
 * @MEI_ME_PCH_CPT_PBG_CFG:Platform Controller Hub workstations
 *                         with quirk for Node Manager exclusion.
 * @MEI_ME_PCH8_CFG:       Platform Controller Hub Gen8 and newer
 *                         client platforms.
 * @MEI_ME_PCH8_ITOUCH_CFG:Platform Controller Hub Gen8 and newer
 *                         client platforms (iTouch).
 * @MEI_ME_PCH8_SPS_4_CFG: Platform Controller Hub Gen8 and newer
 *                         servers platforms with quirk for
 *                         SPS firmware exclusion.
 * @MEI_ME_PCH12_CFG:      Platform Controller Hub Gen12 and newer
 * @MEI_ME_PCH12_SPS_4_CFG:Platform Controller Hub Gen12 up to 4.0
 *                         servers platforms with quirk for
 *                         SPS firmware exclusion.
 * @MEI_ME_PCH12_SPS_CFG:  Platform Controller Hub Gen12 5.0 and newer
 *                         servers platforms with quirk for
 *                         SPS firmware exclusion.
 * @MEI_ME_PCH12_SPS_ITOUCH_CFG: Platform Controller Hub Gen12
 *                         client platforms (iTouch)
 * @MEI_ME_PCH15_CFG:      Platform Controller Hub Gen15 and newer
 * @MEI_ME_PCH15_SPS_CFG:  Platform Controller Hub Gen15 and newer
 *                         servers platforms with quirk for
 *                         SPS firmware exclusion.
 * @MEI_ME_GSC_CFG:        Graphics System Controller
 * @MEI_ME_GSCFI_CFG:      Graphics System Controller Firmware Interface
 * @MEI_ME_CSC_CFG:        Chassis System Controller Firmware Interface
 * @MEI_ME_NUM_CFG:        Upper Sentinel.
 */
enum mei_cfg_idx {
	MEI_ME_UNDEF_CFG,
	MEI_ME_ICH_CFG,
	MEI_ME_ICH10_CFG,
	MEI_ME_PCH6_CFG,
	MEI_ME_PCH7_CFG,
	MEI_ME_PCH_CPT_PBG_CFG,

Annotation

Implementation Notes