drivers/misc/pvpanic/pvpanic.h
Source file repositories/reference/linux-study-clean/drivers/misc/pvpanic/pvpanic.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/misc/pvpanic/pvpanic.h- Extension
.h- Size
- 368 bytes
- Lines
- 20
- Domain
- Driver Families
- Bucket
- drivers/misc
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/compiler_types.h
Detected Declarations
struct attribute_groupstruct device
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0+
/*
* Pvpanic Device Support
*
* Copyright (C) 2021 Oracle.
*/
#ifndef PVPANIC_H_
#define PVPANIC_H_
#include <linux/compiler_types.h>
struct attribute_group;
struct device;
int devm_pvpanic_probe(struct device *dev, void __iomem *base);
extern const struct attribute_group *pvpanic_dev_groups[];
#endif /* PVPANIC_H_ */
Annotation
- Immediate include surface: `linux/compiler_types.h`.
- Detected declarations: `struct attribute_group`, `struct device`.
- Atlas domain: Driver Families / drivers/misc.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.