drivers/misc/pvpanic/pvpanic-pci.c

File Facts

System

Linux kernel

Corpus path

drivers/misc/pvpanic/pvpanic-pci.c

Extension

.c

Size

1115 bytes

Lines

50

Domain

Driver Families

Bucket

drivers/misc

Inferred role

Driver Families: operation-table or driver-model contract

Status

pattern implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/errno.h
• linux/module.h
• linux/pci.h
• linux/types.h
• pvpanic.h

Detected Declarations

• function pvpanic_pci_probe

Annotated Snippet

static struct pci_driver pvpanic_pci_driver = {
	.name =         "pvpanic-pci",
	.id_table =     pvpanic_pci_id_tbl,
	.probe =        pvpanic_pci_probe,
	.dev_groups =   pvpanic_dev_groups,
};
module_pci_driver(pvpanic_pci_driver);

Annotation

• Immediate include surface: `linux/errno.h`, `linux/module.h`, `linux/pci.h`, `linux/types.h`, `pvpanic.h`.
• Detected declarations: `function pvpanic_pci_probe`.
• Atlas domain: Driver Families / drivers/misc.
• Implementation status: pattern implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.