drivers/misc/qcom-coincell.c
Source file repositories/reference/linux-study-clean/drivers/misc/qcom-coincell.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/misc/qcom-coincell.c- Extension
.c- Size
- 3692 bytes
- Lines
- 145
- Domain
- Driver Families
- Bucket
- drivers/misc
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/module.hlinux/slab.hlinux/of.hlinux/regmap.hlinux/platform_device.h
Detected Declarations
struct qcom_coincellfunction qcom_coincell_chgr_configfunction qcom_coincell_probe
Annotated Snippet
struct qcom_coincell {
struct device *dev;
struct regmap *regmap;
u32 base_addr;
};
#define QCOM_COINCELL_REG_RSET 0x44
#define QCOM_COINCELL_REG_VSET 0x45
#define QCOM_COINCELL_REG_ENABLE 0x46
#define QCOM_COINCELL_ENABLE BIT(7)
static const int qcom_rset_map[] = { 2100, 1700, 1200, 800 };
static const int qcom_vset_map[] = { 2500, 3200, 3100, 3000 };
/* NOTE: for pm8921 and others, voltage of 2500 is 16 (10000b), not 0 */
/* if enable==0, rset and vset are ignored */
static int qcom_coincell_chgr_config(struct qcom_coincell *chgr, int rset,
int vset, bool enable)
{
int i, j, rc;
/* if disabling, just do that and skip other operations */
if (!enable)
return regmap_write(chgr->regmap,
chgr->base_addr + QCOM_COINCELL_REG_ENABLE, 0);
/* find index for current-limiting resistor */
for (i = 0; i < ARRAY_SIZE(qcom_rset_map); i++)
if (rset == qcom_rset_map[i])
break;
if (i >= ARRAY_SIZE(qcom_rset_map)) {
dev_err(chgr->dev, "invalid rset-ohms value %d\n", rset);
return -EINVAL;
}
/* find index for charge voltage */
for (j = 0; j < ARRAY_SIZE(qcom_vset_map); j++)
if (vset == qcom_vset_map[j])
break;
if (j >= ARRAY_SIZE(qcom_vset_map)) {
dev_err(chgr->dev, "invalid vset-millivolts value %d\n", vset);
return -EINVAL;
}
rc = regmap_write(chgr->regmap,
chgr->base_addr + QCOM_COINCELL_REG_RSET, i);
if (rc) {
/*
* This is mainly to flag a bad base_addr (reg) from dts.
* Other failures writing to the registers should be
* extremely rare, or indicative of problems that
* should be reported elsewhere (eg. spmi failure).
*/
dev_err(chgr->dev, "could not write to RSET register\n");
return rc;
}
rc = regmap_write(chgr->regmap,
chgr->base_addr + QCOM_COINCELL_REG_VSET, j);
if (rc)
return rc;
/* set 'enable' register */
return regmap_write(chgr->regmap,
chgr->base_addr + QCOM_COINCELL_REG_ENABLE,
QCOM_COINCELL_ENABLE);
}
static int qcom_coincell_probe(struct platform_device *pdev)
{
struct device_node *node = pdev->dev.of_node;
struct qcom_coincell chgr;
u32 rset = 0;
u32 vset = 0;
bool enable;
int rc;
chgr.dev = &pdev->dev;
chgr.regmap = dev_get_regmap(pdev->dev.parent, NULL);
if (!chgr.regmap) {
dev_err(chgr.dev, "Unable to get regmap\n");
return -EINVAL;
}
rc = of_property_read_u32(node, "reg", &chgr.base_addr);
if (rc)
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/module.h`, `linux/slab.h`, `linux/of.h`, `linux/regmap.h`, `linux/platform_device.h`.
- Detected declarations: `struct qcom_coincell`, `function qcom_coincell_chgr_config`, `function qcom_coincell_probe`.
- Atlas domain: Driver Families / drivers/misc.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.