drivers/mmc/host/cavium-octeon.c

Source file repositories/reference/linux-study-clean/drivers/mmc/host/cavium-octeon.c

File Facts

System
Linux kernel
Corpus path
drivers/mmc/host/cavium-octeon.c
Extension
.c
Size
8615 bytes
Lines
341
Domain
Driver Families
Bucket
drivers/mmc
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

OCTEON_IS_MODEL(OCTEON_CNF7XXX)) {
		host->dmar_fixup = octeon_mmc_dmar_fixup;
		host->dmar_fixup_done = octeon_mmc_dmar_fixup_done;
	}

	host->sys_freq = octeon_get_io_clock_rate();

	if (of_device_is_compatible(node, "cavium,octeon-7890-mmc")) {
		host->big_dma_addr = true;
		host->need_irq_handler_lock = true;
		host->has_ciu3 = true;
		host->use_sg = true;
		/*
		 * First seven are the EMM_INT bits 0..6, then two for
		 * the EMM_DMA_INT bits
		 */
		for (i = 0; i < 9; i++) {
			mmc_irq[i] = platform_get_irq(pdev, i);
			if (mmc_irq[i] < 0)
				return mmc_irq[i];

			/* work around legacy u-boot device trees */
			irq_set_irq_type(mmc_irq[i], IRQ_TYPE_EDGE_RISING);
		}
	} else {
		host->big_dma_addr = false;
		host->need_irq_handler_lock = false;
		host->has_ciu3 = false;
		/* First one is EMM second DMA */
		for (i = 0; i < 2; i++) {
			mmc_irq[i] = platform_get_irq(pdev, i);
			if (mmc_irq[i] < 0)
				return mmc_irq[i];
		}
	}

	host->last_slot = -1;

	base = devm_platform_ioremap_resource(pdev, 0);
	if (IS_ERR(base))
		return PTR_ERR(base);
	host->base = base;
	host->reg_off = 0;

	base = devm_platform_ioremap_resource(pdev, 1);
	if (IS_ERR(base))
		return PTR_ERR(base);
	host->dma_base = base;
	/*
	 * To keep the register addresses shared we intentionally use
	 * a negative offset here, first register used on Octeon therefore
	 * starts at 0x20 (MIO_EMM_DMA_CFG).
	 */
	host->reg_off_dma = -0x20;

	ret = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
	if (ret)
		return ret;

	/*
	 * Clear out any pending interrupts that may be left over from
	 * bootloader.
	 */
	val = readq(host->base + MIO_EMM_INT(host));
	writeq(val, host->base + MIO_EMM_INT(host));

	if (host->has_ciu3) {
		/* Only CMD_DONE, DMA_DONE, CMD_ERR, DMA_ERR */
		for (i = 1; i <= 4; i++) {
			ret = devm_request_irq(&pdev->dev, mmc_irq[i],
					       cvm_mmc_interrupt,
					       0, cvm_mmc_irq_names[i], host);
			if (ret < 0) {
				dev_err(&pdev->dev, "Error: devm_request_irq %d\n",
					mmc_irq[i]);
				return ret;
			}
		}
	} else {
		ret = devm_request_irq(&pdev->dev, mmc_irq[0],
				       cvm_mmc_interrupt, 0, KBUILD_MODNAME,
				       host);
		if (ret < 0) {
			dev_err(&pdev->dev, "Error: devm_request_irq %d\n",
				mmc_irq[0]);
			return ret;
		}
	}

	host->global_pwr_gpiod = devm_gpiod_get_optional(&pdev->dev,

Annotation

Implementation Notes