drivers/mmc/host/cqhci.h

Source file repositories/reference/linux-study-clean/drivers/mmc/host/cqhci.h

File Facts

System
Linux kernel
Corpus path
drivers/mmc/host/cqhci.h
Extension
.h
Size
8462 bytes
Lines
331
Domain
Driver Families
Bucket
drivers/mmc
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct cqhci_host {
	const struct cqhci_host_ops *ops;
	void __iomem *mmio;
	struct mmc_host *mmc;

	spinlock_t lock;

	/* relative card address of device */
	unsigned int rca;

	/* 64 bit DMA */
	bool dma64;
	int num_slots;
	int qcnt;

	u32 dcmd_slot;
	u32 caps;
#define CQHCI_TASK_DESC_SZ_128		0x1

	u32 quirks;
#define CQHCI_QUIRK_SHORT_TXFR_DESC_SZ	0x1

	bool enabled;
	bool halted;
	bool init_done;
	bool activated;
	bool waiting_for_idle;
	bool recovery_halt;

	size_t desc_size;
	size_t data_size;

	u8 *desc_base;

	/* total descriptor size */
	u8 slot_sz;

	/* 64/128 bit depends on CQHCI_CFG */
	u8 task_desc_len;

	/* 64 bit on 32-bit arch, 128 bit on 64-bit */
	u8 link_desc_len;

	u8 *trans_desc_base;
	/* same length as transfer descriptor */
	u8 trans_desc_len;

	dma_addr_t desc_dma_base;
	dma_addr_t trans_desc_dma_base;

	struct completion halt_comp;
	wait_queue_head_t wait_queue;
	struct cqhci_slot *slot;

#ifdef CONFIG_MMC_CRYPTO
	union cqhci_crypto_capabilities crypto_capabilities;
	union cqhci_crypto_cap_entry *crypto_cap_array;
	u32 crypto_cfg_register;
#endif
};

struct cqhci_host_ops {
	void (*dumpregs)(struct mmc_host *mmc);
	void (*write_l)(struct cqhci_host *host, u32 val, int reg);
	u32 (*read_l)(struct cqhci_host *host, int reg);
	void (*enable)(struct mmc_host *mmc);
	void (*disable)(struct mmc_host *mmc, bool recovery);
	void (*update_dcmd_desc)(struct mmc_host *mmc, struct mmc_request *mrq,
				 u64 *data);
	void (*pre_enable)(struct mmc_host *mmc);
	void (*post_disable)(struct mmc_host *mmc);
	void (*set_tran_desc)(struct cqhci_host *cq_host, u8 **desc,
			      dma_addr_t addr, int len, bool end, bool dma64);
#ifdef CONFIG_MMC_CRYPTO
	bool uses_custom_crypto_profile;
#endif
};

static inline void cqhci_writel(struct cqhci_host *host, u32 val, int reg)
{
	if (unlikely(host->ops->write_l))
		host->ops->write_l(host, val, reg);
	else
		writel_relaxed(val, host->mmio + reg);
}

static inline u32 cqhci_readl(struct cqhci_host *host, int reg)
{
	if (unlikely(host->ops->read_l))
		return host->ops->read_l(host, reg);

Annotation

Implementation Notes