drivers/mmc/host/jz4740_mmc.c
Source file repositories/reference/linux-study-clean/drivers/mmc/host/jz4740_mmc.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/mmc/host/jz4740_mmc.c- Extension
.c- Size
- 30845 bytes
- Lines
- 1195
- Domain
- Driver Families
- Bucket
- drivers/mmc
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitops.hlinux/clk.hlinux/delay.hlinux/dmaengine.hlinux/dma-mapping.hlinux/err.hlinux/interrupt.hlinux/io.hlinux/irq.hlinux/mmc/host.hlinux/mmc/slot-gpio.hlinux/module.hlinux/of.hlinux/pinctrl/consumer.hlinux/platform_device.hlinux/property.hlinux/regulator/consumer.hlinux/scatterlist.hasm/cacheflush.h
Detected Declarations
struct jz4740_mmc_hostenum jz4740_mmc_versionenum jz4740_mmc_stateenum jz4780_cookiefunction jz4740_mmc_write_irq_maskfunction jz4740_mmc_write_irq_regfunction jz4740_mmc_read_irq_regfunction jz4740_mmc_release_dma_channelsfunction jz4740_mmc_acquire_dma_channelsfunction jz4740_mmc_dma_unmapfunction jz4740_mmc_prepare_dma_datafunction jz4740_mmc_start_dma_transferfunction jz4740_mmc_pre_requestfunction jz4740_mmc_post_requestfunction jz4740_mmc_set_irq_enabledfunction jz4740_mmc_clock_enablefunction jz4740_mmc_clock_disablefunction jz4740_mmc_resetfunction jz4740_mmc_request_donefunction jz4740_mmc_poll_irqfunction jz4740_mmc_transfer_check_statefunction jz4740_mmc_write_datafunction jz4740_mmc_read_datafunction jz4740_mmc_timeoutfunction jz4740_mmc_read_responsefunction jz4740_mmc_send_commandfunction jz_mmc_prepare_data_transferfunction jz_mmc_irq_workerfunction jz_mmc_irqfunction jz4740_mmc_set_clock_ratefunction jz4740_mmc_requestfunction jz4740_mmc_set_iosfunction jz4740_mmc_enable_sdio_irqfunction jz4740_voltage_switchfunction jz4740_mmc_probefunction jz4740_mmc_removefunction jz4740_mmc_suspendfunction jz4740_mmc_resume
Annotated Snippet
struct jz4740_mmc_host {
struct mmc_host *mmc;
struct platform_device *pdev;
struct clk *clk;
enum jz4740_mmc_version version;
int irq;
void __iomem *base;
struct resource *mem_res;
struct mmc_request *req;
struct mmc_command *cmd;
bool vqmmc_enabled;
unsigned long waiting;
uint32_t cmdat;
uint32_t irq_mask;
spinlock_t lock;
struct timer_list timeout_timer;
struct sg_mapping_iter miter;
enum jz4740_mmc_state state;
/* DMA support */
struct dma_chan *dma_rx;
struct dma_chan *dma_tx;
bool use_dma;
/* The DMA trigger level is 8 words, that is to say, the DMA read
* trigger is when data words in MSC_RXFIFO is >= 8 and the DMA write
* trigger is when data words in MSC_TXFIFO is < 8.
*/
#define JZ4740_MMC_FIFO_HALF_SIZE 8
};
static void jz4740_mmc_write_irq_mask(struct jz4740_mmc_host *host,
uint32_t val)
{
if (host->version >= JZ_MMC_JZ4725B)
return writel(val, host->base + JZ_REG_MMC_IMASK);
else
return writew(val, host->base + JZ_REG_MMC_IMASK);
}
static void jz4740_mmc_write_irq_reg(struct jz4740_mmc_host *host,
uint32_t val)
{
if (host->version >= JZ_MMC_JZ4780)
writel(val, host->base + JZ_REG_MMC_IREG);
else
writew(val, host->base + JZ_REG_MMC_IREG);
}
static uint32_t jz4740_mmc_read_irq_reg(struct jz4740_mmc_host *host)
{
if (host->version >= JZ_MMC_JZ4780)
return readl(host->base + JZ_REG_MMC_IREG);
else
return readw(host->base + JZ_REG_MMC_IREG);
}
/*----------------------------------------------------------------------------*/
/* DMA infrastructure */
static void jz4740_mmc_release_dma_channels(struct jz4740_mmc_host *host)
{
if (!host->use_dma)
return;
dma_release_channel(host->dma_tx);
if (host->dma_rx)
dma_release_channel(host->dma_rx);
}
static int jz4740_mmc_acquire_dma_channels(struct jz4740_mmc_host *host)
{
struct device *dev = mmc_dev(host->mmc);
host->dma_tx = dma_request_chan(dev, "tx-rx");
if (!IS_ERR(host->dma_tx))
return 0;
if (PTR_ERR(host->dma_tx) != -ENODEV) {
dev_err(dev, "Failed to get dma tx-rx channel\n");
return PTR_ERR(host->dma_tx);
Annotation
- Immediate include surface: `linux/bitops.h`, `linux/clk.h`, `linux/delay.h`, `linux/dmaengine.h`, `linux/dma-mapping.h`, `linux/err.h`, `linux/interrupt.h`, `linux/io.h`.
- Detected declarations: `struct jz4740_mmc_host`, `enum jz4740_mmc_version`, `enum jz4740_mmc_state`, `enum jz4780_cookie`, `function jz4740_mmc_write_irq_mask`, `function jz4740_mmc_write_irq_reg`, `function jz4740_mmc_read_irq_reg`, `function jz4740_mmc_release_dma_channels`, `function jz4740_mmc_acquire_dma_channels`, `function jz4740_mmc_dma_unmap`.
- Atlas domain: Driver Families / drivers/mmc.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.