drivers/mmc/host/mtk-sd.c
Source file repositories/reference/linux-study-clean/drivers/mmc/host/mtk-sd.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/mmc/host/mtk-sd.c- Extension
.c- Size
- 101041 bytes
- Lines
- 3407
- Domain
- Driver Families
- Bucket
- drivers/mmc
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/module.hlinux/bitfield.hlinux/bitops.hlinux/clk.hlinux/delay.hlinux/dma-mapping.hlinux/iopoll.hlinux/ioport.hlinux/irq.hlinux/of.hlinux/pinctrl/consumer.hlinux/platform_device.hlinux/pm.hlinux/pm_runtime.hlinux/pm_wakeirq.hlinux/regulator/consumer.hlinux/slab.hlinux/spinlock.hlinux/interrupt.hlinux/reset.hlinux/mmc/card.hlinux/mmc/core.hlinux/mmc/host.hlinux/mmc/mmc.hlinux/mmc/sd.hlinux/mmc/sdio.hlinux/mmc/slot-gpio.hcqhci.hmmc_hsq.h
Detected Declarations
struct mt_gpdma_descstruct mt_bdma_descstruct msdc_dmastruct msdc_save_parastruct mtk_mmc_compatiblestruct msdc_tune_parastruct msdc_delay_phasestruct msdc_hostfunction sdr_set_bitsfunction sdr_clr_bitsfunction sdr_set_fieldfunction sdr_get_fieldfunction msdc_reset_hwfunction msdc_dma_calcsfunction msdc_dma_setupfunction msdc_prepare_datafunction msdc_data_preparedfunction msdc_unprepare_datafunction msdc_timeout_calfunction msdc_set_timeoutfunction msdc_set_busy_timeoutfunction msdc_gate_clockfunction msdc_ungate_clockfunction msdc_new_tx_settingfunction msdc_set_mclkfunction mmc_select_hs400function msdc_cmd_find_respfunction msdc_cmd_prepare_raw_cmdfunction msdc_start_datafunction msdc_auto_cmd_donefunction msdc_recheck_sdio_irqfunction msdc_track_cmd_datafunction msdc_request_donefunction msdc_cmd_donefunction msdc_cmd_is_readyfunction msdc_start_commandfunction msdc_cmd_nextfunction msdc_ops_requestfunction msdc_pre_reqfunction msdc_post_reqfunction msdc_data_xfer_nextfunction msdc_data_xfer_donefunction msdc_set_buswidthfunction msdc_ops_switch_voltfunction msdc_card_busyfunction msdc_request_timeoutfunction __msdc_enable_sdio_irqfunction msdc_enable_sdio_irq
Annotated Snippet
struct mt_gpdma_desc {
u32 gpd_info;
#define GPDMA_DESC_HWO BIT(0)
#define GPDMA_DESC_BDP BIT(1)
#define GPDMA_DESC_CHECKSUM GENMASK(15, 8)
#define GPDMA_DESC_INT BIT(16)
#define GPDMA_DESC_NEXT_H4 GENMASK(27, 24)
#define GPDMA_DESC_PTR_H4 GENMASK(31, 28)
u32 next;
u32 ptr;
u32 gpd_data_len;
#define GPDMA_DESC_BUFLEN GENMASK(15, 0)
#define GPDMA_DESC_EXTLEN GENMASK(23, 16)
u32 arg;
u32 blknum;
u32 cmd;
};
struct mt_bdma_desc {
u32 bd_info;
#define BDMA_DESC_EOL BIT(0)
#define BDMA_DESC_CHECKSUM GENMASK(15, 8)
#define BDMA_DESC_BLKPAD BIT(17)
#define BDMA_DESC_DWPAD BIT(18)
#define BDMA_DESC_NEXT_H4 GENMASK(27, 24)
#define BDMA_DESC_PTR_H4 GENMASK(31, 28)
u32 next;
u32 ptr;
u32 bd_data_len;
#define BDMA_DESC_BUFLEN GENMASK(15, 0)
#define BDMA_DESC_BUFLEN_EXT GENMASK(23, 0)
};
struct msdc_dma {
struct scatterlist *sg; /* I/O scatter list */
struct mt_gpdma_desc *gpd; /* pointer to gpd array */
struct mt_bdma_desc *bd; /* pointer to bd array */
dma_addr_t gpd_addr; /* the physical address of gpd array */
dma_addr_t bd_addr; /* the physical address of bd array */
};
struct msdc_save_para {
u32 msdc_cfg;
u32 iocon;
u32 sdc_cfg;
u32 pad_tune;
u32 patch_bit0;
u32 patch_bit1;
u32 patch_bit2;
u32 pad_ds_tune;
u32 pad_cmd_tune;
u32 emmc50_cfg0;
u32 emmc50_cfg3;
u32 sdc_fifo_cfg;
u32 emmc_top_control;
u32 emmc_top_cmd;
u32 emmc50_pad_ds_tune;
u32 loop_test_control;
};
struct mtk_mmc_compatible {
u8 clk_div_bits;
bool recheck_sdio_irq;
bool hs400_tune; /* only used for MT8173 */
bool needs_top_base;
u32 pad_tune_reg;
bool async_fifo;
bool data_tune;
bool busy_check;
bool stop_clk_fix;
u8 stop_dly_sel;
u8 pop_en_cnt;
bool enhance_rx;
bool support_64g;
bool use_internal_cd;
bool support_new_tx;
bool support_new_rx;
bool support_spm_res_release;
};
struct msdc_tune_para {
u32 iocon;
u32 pad_tune;
u32 pad_cmd_tune;
u32 emmc_top_control;
u32 emmc_top_cmd;
};
struct msdc_delay_phase {
u8 maxlen;
Annotation
- Immediate include surface: `linux/module.h`, `linux/bitfield.h`, `linux/bitops.h`, `linux/clk.h`, `linux/delay.h`, `linux/dma-mapping.h`, `linux/iopoll.h`, `linux/ioport.h`.
- Detected declarations: `struct mt_gpdma_desc`, `struct mt_bdma_desc`, `struct msdc_dma`, `struct msdc_save_para`, `struct mtk_mmc_compatible`, `struct msdc_tune_para`, `struct msdc_delay_phase`, `struct msdc_host`, `function sdr_set_bits`, `function sdr_clr_bits`.
- Atlas domain: Driver Families / drivers/mmc.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.