drivers/mmc/host/sdhci-cqhci.h
Source file repositories/reference/linux-study-clean/drivers/mmc/host/sdhci-cqhci.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/mmc/host/sdhci-cqhci.h- Extension
.h- Size
- 609 bytes
- Lines
- 25
- Domain
- Driver Families
- Bucket
- drivers/mmc
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
cqhci.hsdhci.h
Detected Declarations
function sdhci_and_cqhci_reset
Annotated Snippet
#ifndef __MMC_HOST_SDHCI_CQHCI_H__
#define __MMC_HOST_SDHCI_CQHCI_H__
#include "cqhci.h"
#include "sdhci.h"
static inline void sdhci_and_cqhci_reset(struct sdhci_host *host, u8 mask)
{
if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL) &&
host->mmc->cqe_private)
cqhci_deactivate(host->mmc);
sdhci_reset(host, mask);
}
#endif /* __MMC_HOST_SDHCI_CQHCI_H__ */
Annotation
- Immediate include surface: `cqhci.h`, `sdhci.h`.
- Detected declarations: `function sdhci_and_cqhci_reset`.
- Atlas domain: Driver Families / drivers/mmc.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.