drivers/mmc/host/sdhci-of-dwcmshc.c
Source file repositories/reference/linux-study-clean/drivers/mmc/host/sdhci-of-dwcmshc.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/mmc/host/sdhci-of-dwcmshc.c- Extension
.c- Size
- 81758 bytes
- Lines
- 2647
- Domain
- Driver Families
- Bucket
- drivers/mmc
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/acpi.hlinux/arm-smccc.hlinux/bitfield.hlinux/clk.hlinux/clk-provider.hlinux/dma-mapping.hlinux/iopoll.hlinux/kernel.hlinux/module.hlinux/of.hlinux/platform_device.hlinux/pm_domain.hlinux/pm_runtime.hlinux/regmap.hlinux/reset.hlinux/sizes.hlinux/mfd/syscon.hlinux/units.hsdhci-pltfm.hcqhci.hsdhci-cqhci.h
Detected Declarations
struct rk35xx_privstruct eic7700_privstruct k230_privstruct dwcmshc_privstruct dwcmshc_pltfm_datastruct k230_pltfm_datastruct rockchip_pltfm_datafunction dwcmshc_enable_card_clkfunction dwcmshc_get_enable_other_clksfunction dwcmshc_adma_write_descfunction dwcmshc_resetfunction dwcmshc_get_max_clockfunction rk35xx_get_max_clockfunction dwcmshc_check_auto_cmd23function dwcmshc_requestfunction dwcmshc_phy_initfunction th1520_sdhci_set_phyfunction dwcmshc_set_uhs_signalingfunction th1520_set_uhs_signalingfunction dwcmshc_hs400_enhanced_strobefunction dwcmshc_execute_tuningfunction dwcmshc_cqe_irq_handlerfunction dwcmshc_sdhci_cqe_enablefunction dwcmshc_set_tran_descfunction dwcmshc_cqhci_dumpregsfunction rk35xx_sdhci_cqe_pre_enablefunction rk35xx_sdhci_cqe_enablefunction rk35xx_sdhci_cqe_disablefunction rk35xx_sdhci_cqe_post_disablefunction dwcmshc_rk3568_set_clockfunction rk35xx_sdhci_resetfunction dwcmshc_rk35xx_initfunction dwcmshc_rk35xx_postinitfunction dwcmshc_rk3576_postinitfunction th1520_execute_tuningfunction th1520_sdhci_resetfunction th1520_initfunction start_signal_voltage_switchfunction cv18xx_sdhci_resetfunction cv18xx_sdhci_set_tapfunction cv18xx_retry_tuningfunction cv18xx_sdhci_post_tuningfunction cv18xx_sdhci_execute_tuningfunction sg2042_sdhci_phy_initfunction sg2042_sdhci_resetfunction sg2042_initfunction dwcmshc_hpe_vendor_specificfunction dwcmshc_hpe_set_emmc
Annotated Snippet
struct rk35xx_priv {
struct reset_control *reset;
u8 txclk_tapnum;
};
struct eic7700_priv {
struct reset_control *reset;
unsigned int drive_impedance;
};
struct k230_priv {
/* Canaan k230 specific */
struct regmap *hi_sys_regmap;
};
#define DWCMSHC_MAX_OTHER_CLKS 3
struct dwcmshc_priv {
struct clk *bus_clk;
int vendor_specific_area1; /* P_VENDOR_SPECIFIC_AREA1 reg */
int vendor_specific_area2; /* P_VENDOR_SPECIFIC_AREA2 reg */
int num_other_clks;
struct clk_bulk_data other_clks[DWCMSHC_MAX_OTHER_CLKS];
const struct dwcmshc_pltfm_data *dwcmshc_pdata;
void *priv; /* pointer to SoC private stuff */
u16 delay_line;
u16 flags;
};
struct dwcmshc_pltfm_data {
const struct sdhci_pltfm_data pdata;
const struct cqhci_host_ops *cqhci_host_ops;
int (*init)(struct device *dev, struct sdhci_host *host, struct dwcmshc_priv *dwc_priv);
void (*postinit)(struct sdhci_host *host, struct dwcmshc_priv *dwc_priv);
};
struct k230_pltfm_data {
struct dwcmshc_pltfm_data dwcmshc_pdata;
bool is_emmc;
u32 ctrl_reg;
u32 vol_stable_bit;
u32 write_prot_bit;
};
struct rockchip_pltfm_data {
struct dwcmshc_pltfm_data dwcmshc_pdata;
/*
* The controller hardware has two known revisions documented internally:
* - Revision 0: Exclusively used by RK3566 and RK3568 SoCs.
* - Revision 1: Implemented in all other Rockchip SoCs, including RK3576, RK3588, etc.
*/
int revision;
};
static void dwcmshc_enable_card_clk(struct sdhci_host *host)
{
u16 ctrl;
ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
if ((ctrl & SDHCI_CLOCK_INT_EN) && !(ctrl & SDHCI_CLOCK_CARD_EN)) {
ctrl |= SDHCI_CLOCK_CARD_EN;
sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL);
}
}
static int dwcmshc_get_enable_other_clks(struct device *dev,
struct dwcmshc_priv *priv,
int num_clks,
const char * const clk_ids[])
{
int err;
if (num_clks > DWCMSHC_MAX_OTHER_CLKS)
return -EINVAL;
for (int i = 0; i < num_clks; i++)
priv->other_clks[i].id = clk_ids[i];
err = devm_clk_bulk_get_optional(dev, num_clks, priv->other_clks);
if (err) {
dev_err(dev, "failed to get clocks %d\n", err);
return err;
}
err = clk_bulk_prepare_enable(num_clks, priv->other_clks);
if (err)
dev_err(dev, "failed to enable clocks %d\n", err);
Annotation
- Immediate include surface: `linux/acpi.h`, `linux/arm-smccc.h`, `linux/bitfield.h`, `linux/clk.h`, `linux/clk-provider.h`, `linux/dma-mapping.h`, `linux/iopoll.h`, `linux/kernel.h`.
- Detected declarations: `struct rk35xx_priv`, `struct eic7700_priv`, `struct k230_priv`, `struct dwcmshc_priv`, `struct dwcmshc_pltfm_data`, `struct k230_pltfm_data`, `struct rockchip_pltfm_data`, `function dwcmshc_enable_card_clk`, `function dwcmshc_get_enable_other_clks`, `function dwcmshc_adma_write_desc`.
- Atlas domain: Driver Families / drivers/mmc.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.