drivers/mmc/host/uniphier-sd.c
Source file repositories/reference/linux-study-clean/drivers/mmc/host/uniphier-sd.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/mmc/host/uniphier-sd.c- Extension
.c- Size
- 20537 bytes
- Lines
- 765
- Domain
- Driver Families
- Bucket
- drivers/mmc
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/bitops.hlinux/clk.hlinux/delay.hlinux/dma-mapping.hlinux/mfd/syscon.hlinux/mmc/host.hlinux/module.hlinux/of.hlinux/pinctrl/consumer.hlinux/platform_data/tmio.hlinux/platform_device.hlinux/regmap.hlinux/reset.htmio_mmc.h
Detected Declarations
struct uniphier_sd_privfunction uniphier_sd_dma_endisablefunction uniphier_sd_external_dma_issuefunction uniphier_sd_external_dma_callbackfunction uniphier_sd_external_dma_startfunction uniphier_sd_external_dma_enablefunction uniphier_sd_external_dma_releasefunction uniphier_sd_external_dma_abortfunction uniphier_sd_external_dma_dataendfunction uniphier_sd_internal_dma_issuefunction uniphier_sd_internal_dma_startfunction uniphier_sd_internal_dma_enablefunction uniphier_sd_internal_dma_releasefunction uniphier_sd_internal_dma_abortfunction uniphier_sd_internal_dma_dataendfunction uniphier_sd_clk_enablefunction uniphier_sd_clk_disablefunction uniphier_sd_hw_resetfunction uniphier_sd_speed_switchfunction uniphier_sd_uhs_enablefunction uniphier_sd_set_clockfunction uniphier_sd_host_initfunction uniphier_sd_start_signal_voltage_switchfunction uniphier_sd_uhs_initfunction uniphier_sd_probefunction uniphier_sd_remove
Annotated Snippet
struct uniphier_sd_priv {
struct tmio_mmc_data tmio_data;
struct pinctrl *pinctrl;
struct pinctrl_state *pinstate_uhs;
struct clk *clk;
struct reset_control *rst;
struct reset_control *rst_br;
struct reset_control *rst_hw;
struct dma_chan *chan;
enum dma_data_direction dma_dir;
struct regmap *sdctrl_regmap;
u32 sdctrl_ch;
unsigned long clk_rate;
unsigned long caps;
};
static void *uniphier_sd_priv(struct tmio_mmc_host *host)
{
return container_of(host->pdata, struct uniphier_sd_priv, tmio_data);
}
static void uniphier_sd_dma_endisable(struct tmio_mmc_host *host, int enable)
{
sd_ctrl_write16(host, CTL_DMA_ENABLE, enable ? DMA_ENABLE_DMASDRW : 0);
}
/* external DMA engine */
static void uniphier_sd_external_dma_issue(struct work_struct *t)
{
struct tmio_mmc_host *host = from_work(host, t, dma_issue);
struct uniphier_sd_priv *priv = uniphier_sd_priv(host);
uniphier_sd_dma_endisable(host, 1);
dma_async_issue_pending(priv->chan);
}
static void uniphier_sd_external_dma_callback(void *param,
const struct dmaengine_result *result)
{
struct tmio_mmc_host *host = param;
struct uniphier_sd_priv *priv = uniphier_sd_priv(host);
unsigned long flags;
dma_unmap_sg(mmc_dev(host->mmc), host->sg_ptr, host->sg_len,
priv->dma_dir);
spin_lock_irqsave(&host->lock, flags);
if (result->result == DMA_TRANS_NOERROR) {
/*
* When the external DMA engine is enabled, strangely enough,
* the DATAEND flag can be asserted even if the DMA engine has
* not been kicked yet. Enable the TMIO_STAT_DATAEND irq only
* after we make sure the DMA engine finishes the transfer,
* hence, in this callback.
*/
tmio_mmc_enable_mmc_irqs(host, TMIO_STAT_DATAEND);
} else {
host->data->error = -ETIMEDOUT;
tmio_mmc_do_data_irq(host);
}
spin_unlock_irqrestore(&host->lock, flags);
}
static void uniphier_sd_external_dma_start(struct tmio_mmc_host *host,
struct mmc_data *data)
{
struct uniphier_sd_priv *priv = uniphier_sd_priv(host);
enum dma_transfer_direction dma_tx_dir;
struct dma_async_tx_descriptor *desc;
dma_cookie_t cookie;
int sg_len;
if (!priv->chan)
goto force_pio;
if (data->flags & MMC_DATA_READ) {
priv->dma_dir = DMA_FROM_DEVICE;
dma_tx_dir = DMA_DEV_TO_MEM;
} else {
priv->dma_dir = DMA_TO_DEVICE;
dma_tx_dir = DMA_MEM_TO_DEV;
}
sg_len = dma_map_sg(mmc_dev(host->mmc), host->sg_ptr, host->sg_len,
priv->dma_dir);
if (sg_len == 0)
goto force_pio;
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/bitops.h`, `linux/clk.h`, `linux/delay.h`, `linux/dma-mapping.h`, `linux/mfd/syscon.h`, `linux/mmc/host.h`, `linux/module.h`.
- Detected declarations: `struct uniphier_sd_priv`, `function uniphier_sd_dma_endisable`, `function uniphier_sd_external_dma_issue`, `function uniphier_sd_external_dma_callback`, `function uniphier_sd_external_dma_start`, `function uniphier_sd_external_dma_enable`, `function uniphier_sd_external_dma_release`, `function uniphier_sd_external_dma_abort`, `function uniphier_sd_external_dma_dataend`, `function uniphier_sd_internal_dma_issue`.
- Atlas domain: Driver Families / drivers/mmc.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.