drivers/mtd/nand/onenand/onenand_base.c
Source file repositories/reference/linux-study-clean/drivers/mtd/nand/onenand/onenand_base.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/mtd/nand/onenand/onenand_base.c- Extension
.c- Size
- 105311 bytes
- Lines
- 4028
- Domain
- Driver Families
- Bucket
- drivers/mtd
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Touches user memory; correctness depends on fault-safe copying and privilege boundary handling.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/module.hlinux/moduleparam.hlinux/slab.hlinux/sched.hlinux/delay.hlinux/interrupt.hlinux/jiffies.hlinux/mtd/mtd.hlinux/mtd/onenand.hlinux/mtd/partitions.hasm/io.h
Detected Declarations
function flexonenand_ooblayout_eccfunction flexonenand_ooblayout_freefunction onenand_ooblayout_128_eccfunction onenand_ooblayout_128_freefunction onenand_ooblayout_32_64_eccfunction onenand_ooblayout_32_64_freefunction onenand_readwfunction onenand_writewfunction Registerfunction Registerfunction Registerfunction Registerfunction flexonenand_blockfunction onenand_blockfunction flexonenand_addrfunction onenand_addrfunction onenand_get_densityfunction flexonenand_regionfunction devicesfunction onenand_read_eccfunction onenand_waitfunction recoveryfunction onenand_interruptfunction onenand_interrupt_waitfunction waitfunction onenand_setup_waitfunction onenand_bufferram_offsetfunction onenand_read_bufferramfunction onenand_sync_read_bufferramfunction onenand_write_bufferramfunction onenand_get_2x_blockpagefunction onenand_check_bufferramfunction onenand_update_bufferramfunction onenand_invalidate_bufferramfunction onenand_get_devicefunction onenand_release_devicefunction onenand_transfer_auto_oobfunction onenand_recover_lsbfunction onenand_mlc_read_ops_nolockfunction onenand_read_ops_nolockfunction onenand_read_oob_nolockfunction onenand_read_oobfunction onenand_bbt_waitfunction onenand_bbt_read_oobfunction onenand_verify_oobfunction onenand_verifyfunction onenand_panic_waitfunction onenand_panic_write
Annotated Snippet
if (ONENAND_IS_2PLANE(this)) {
/* Make the even block number */
block &= ~1;
/* Is it the odd plane? */
if (addr & this->writesize)
block++;
page >>= 1;
}
page &= this->page_mask;
break;
}
/* NOTE: The setting order of the registers is very important! */
if (cmd == ONENAND_CMD_BUFFERRAM) {
/* Select DataRAM for DDP */
value = onenand_bufferram_address(this, block);
this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
if (ONENAND_IS_2PLANE(this) || ONENAND_IS_4KB_PAGE(this))
/* It is always BufferRAM0 */
ONENAND_SET_BUFFERRAM0(this);
else
/* Switch to the next data buffer */
ONENAND_SET_NEXT_BUFFERRAM(this);
return 0;
}
if (block != -1) {
/* Write 'DFS, FBA' of Flash */
value = onenand_block_address(this, block);
this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
/* Select DataRAM for DDP */
value = onenand_bufferram_address(this, block);
this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
}
if (page != -1) {
/* Now we use page size operation */
int sectors = 0, count = 0;
int dataram;
switch (cmd) {
case FLEXONENAND_CMD_RECOVER_LSB:
case ONENAND_CMD_READ:
case ONENAND_CMD_READOOB:
if (ONENAND_IS_4KB_PAGE(this))
/* It is always BufferRAM0 */
dataram = ONENAND_SET_BUFFERRAM0(this);
else
dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
break;
default:
if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
cmd = ONENAND_CMD_2X_PROG;
dataram = ONENAND_CURRENT_BUFFERRAM(this);
break;
}
/* Write 'FPA, FSA' of Flash */
value = onenand_page_address(page, sectors);
this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
/* Write 'BSA, BSC' of DataRAM */
value = onenand_buffer_address(dataram, sectors, count);
this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
}
/* Interrupt clear */
this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
/* Write command */
this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
return 0;
}
/**
* onenand_read_ecc - return ecc status
* @this: onenand chip structure
*/
static inline int onenand_read_ecc(struct onenand_chip *this)
{
int ecc, i, result = 0;
if (!FLEXONENAND(this) && !ONENAND_IS_4KB_PAGE(this))
return this->read_word(this->base + ONENAND_REG_ECC_STATUS);
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/module.h`, `linux/moduleparam.h`, `linux/slab.h`, `linux/sched.h`, `linux/delay.h`, `linux/interrupt.h`, `linux/jiffies.h`.
- Detected declarations: `function flexonenand_ooblayout_ecc`, `function flexonenand_ooblayout_free`, `function onenand_ooblayout_128_ecc`, `function onenand_ooblayout_128_free`, `function onenand_ooblayout_32_64_ecc`, `function onenand_ooblayout_32_64_free`, `function onenand_readw`, `function onenand_writew`, `function Register`, `function Register`.
- Atlas domain: Driver Families / drivers/mtd.
- Implementation status: integration implementation candidate.
- This snippet crosses the user/kernel memory boundary; validate fault handling and access checks before translating the pattern.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.