drivers/mtd/nand/raw/atmel/nand-controller.c
Source file repositories/reference/linux-study-clean/drivers/mtd/nand/raw/atmel/nand-controller.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/mtd/nand/raw/atmel/nand-controller.c- Extension
.c- Size
- 68773 bytes
- Lines
- 2687
- Domain
- Driver Families
- Bucket
- drivers/mtd
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hlinux/dma-mapping.hlinux/dmaengine.hlinux/genalloc.hlinux/gpio/consumer.hlinux/interrupt.hlinux/mfd/syscon.hlinux/mfd/syscon/atmel-matrix.hlinux/mfd/syscon/atmel-smc.hlinux/module.hlinux/mtd/rawnand.hlinux/of_address.hlinux/of_irq.hlinux/of_platform.hlinux/iopoll.hlinux/platform_device.hlinux/regmap.hsoc/at91/atmel-sfr.hpmecc.h
Detected Declarations
struct atmel_nand_rbstruct atmel_nand_csstruct atmel_nandstruct atmel_nfc_opstruct atmel_nand_controllerstruct atmel_nand_controller_capsstruct atmel_nand_controller_opsstruct atmel_nand_controller_capsstruct atmel_nand_controllerstruct atmel_smc_nand_ebi_csa_cfgstruct atmel_smc_nand_controllerstruct atmel_hsmc_nand_controllerenum atmel_nand_rb_typeenum atmel_nfc_data_xferfunction to_nand_controllerfunction to_smc_nand_controllerfunction to_hsmc_nand_controllerfunction atmel_nfc_op_donefunction atmel_nfc_interruptfunction atmel_nfc_waitfunction atmel_nand_dma_transfer_finishedfunction atmel_nand_dma_transferfunction atmel_nfc_exec_opfunction atmel_nand_data_infunction atmel_nand_data_outfunction atmel_nand_waitrdyfunction atmel_hsmc_nand_waitrdyfunction atmel_nand_select_targetfunction atmel_hsmc_nand_select_targetfunction atmel_smc_nand_exec_instrfunction atmel_smc_nand_exec_opfunction atmel_hsmc_exec_cmd_addrfunction atmel_hsmc_exec_rwfunction atmel_hsmc_exec_waitrdyfunction atmel_hsmc_nand_exec_opfunction atmel_nfc_copy_to_sramfunction atmel_nfc_copy_from_sramfunction atmel_nfc_set_op_addrfunction atmel_nand_pmecc_enablefunction atmel_nand_pmecc_disablefunction atmel_nand_pmecc_generate_eccbytesfunction atmel_nand_pmecc_correct_datafunction atmel_nand_pmecc_write_pgfunction atmel_nand_pmecc_write_pagefunction atmel_nand_pmecc_write_page_rawfunction atmel_nand_pmecc_read_pgfunction atmel_nand_pmecc_read_pagefunction atmel_nand_pmecc_read_page_raw
Annotated Snippet
struct atmel_nand_rb {
enum atmel_nand_rb_type type;
union {
struct gpio_desc *gpio;
int id;
};
};
struct atmel_nand_cs {
int id;
struct atmel_nand_rb rb;
struct gpio_desc *csgpio;
struct {
void __iomem *virt;
dma_addr_t dma;
} io;
struct atmel_smc_cs_conf smcconf;
};
struct atmel_nand {
struct list_head node;
struct device *dev;
struct nand_chip base;
struct atmel_nand_cs *activecs;
struct atmel_pmecc_user *pmecc;
struct gpio_desc *cdgpio;
int numcs;
struct atmel_nand_cs cs[] __counted_by(numcs);
};
static inline struct atmel_nand *to_atmel_nand(struct nand_chip *chip)
{
return container_of(chip, struct atmel_nand, base);
}
enum atmel_nfc_data_xfer {
ATMEL_NFC_NO_DATA,
ATMEL_NFC_READ_DATA,
ATMEL_NFC_WRITE_DATA,
};
struct atmel_nfc_op {
u8 cs;
u8 ncmds;
u8 cmds[2];
u8 naddrs;
u8 addrs[5];
enum atmel_nfc_data_xfer data;
u32 wait;
u32 errors;
};
struct atmel_nand_controller;
struct atmel_nand_controller_caps;
struct atmel_nand_controller_ops {
int (*probe)(struct platform_device *pdev,
const struct atmel_nand_controller_caps *caps);
int (*remove)(struct atmel_nand_controller *nc);
void (*nand_init)(struct atmel_nand_controller *nc,
struct atmel_nand *nand);
int (*ecc_init)(struct nand_chip *chip);
int (*setup_interface)(struct atmel_nand *nand, int csline,
const struct nand_interface_config *conf);
int (*exec_op)(struct atmel_nand *nand,
const struct nand_operation *op, bool check_only);
};
struct atmel_nand_controller_caps {
bool has_dma;
bool legacy_of_bindings;
u32 ale_offs;
u32 cle_offs;
const char *ebi_csa_regmap_name;
const struct atmel_nand_controller_ops *ops;
};
struct atmel_nand_controller {
struct nand_controller base;
const struct atmel_nand_controller_caps *caps;
struct device *dev;
struct regmap *smc;
struct dma_chan *dmac;
struct atmel_pmecc *pmecc;
struct list_head chips;
struct clk *mck;
};
static inline struct atmel_nand_controller *
Annotation
- Immediate include surface: `linux/clk.h`, `linux/dma-mapping.h`, `linux/dmaengine.h`, `linux/genalloc.h`, `linux/gpio/consumer.h`, `linux/interrupt.h`, `linux/mfd/syscon.h`, `linux/mfd/syscon/atmel-matrix.h`.
- Detected declarations: `struct atmel_nand_rb`, `struct atmel_nand_cs`, `struct atmel_nand`, `struct atmel_nfc_op`, `struct atmel_nand_controller`, `struct atmel_nand_controller_caps`, `struct atmel_nand_controller_ops`, `struct atmel_nand_controller_caps`, `struct atmel_nand_controller`, `struct atmel_smc_nand_ebi_csa_cfg`.
- Atlas domain: Driver Families / drivers/mtd.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.