drivers/mtd/nand/raw/brcmnand/bcma_nand.c

Source file repositories/reference/linux-study-clean/drivers/mtd/nand/raw/brcmnand/bcma_nand.c

File Facts

System
Linux kernel
Corpus path
drivers/mtd/nand/raw/brcmnand/bcma_nand.c
Extension
.c
Size
3393 bytes
Lines
133
Domain
Driver Families
Bucket
drivers/mtd
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct brcmnand_bcma_soc {
	struct brcmnand_soc soc;
	struct bcma_drv_cc *cc;
};

static inline bool brcmnand_bcma_needs_swapping(u32 offset)
{
	switch (offset) {
	case BCMA_CC_NAND_SPARE_RD0:
	case BCMA_CC_NAND_SPARE_RD4:
	case BCMA_CC_NAND_SPARE_RD8:
	case BCMA_CC_NAND_SPARE_RD12:
	case BCMA_CC_NAND_SPARE_WR0:
	case BCMA_CC_NAND_SPARE_WR4:
	case BCMA_CC_NAND_SPARE_WR8:
	case BCMA_CC_NAND_SPARE_WR12:
	case BCMA_CC_NAND_DEVID:
	case BCMA_CC_NAND_DEVID_X:
	case BCMA_CC_NAND_SPARE_RD16:
	case BCMA_CC_NAND_SPARE_RD20:
	case BCMA_CC_NAND_SPARE_RD24:
	case BCMA_CC_NAND_SPARE_RD28:
		return true;
	}

	return false;
}

static inline struct brcmnand_bcma_soc *to_bcma_soc(struct brcmnand_soc *soc)
{
	return container_of(soc, struct brcmnand_bcma_soc, soc);
}

static u32 brcmnand_bcma_read_reg(struct brcmnand_soc *soc, u32 offset)
{
	struct brcmnand_bcma_soc *sc = to_bcma_soc(soc);
	u32 val;

	/* Offset into the NAND block and deal with the flash cache separately */
	if (offset == BRCMNAND_NON_MMIO_FC_ADDR)
		offset = BCMA_CC_NAND_CACHE_DATA;
	else
		offset += BCMA_CC_NAND_REVISION;

	val = bcma_cc_read32(sc->cc, offset);

	/* Swap if necessary */
	if (brcmnand_bcma_needs_swapping(offset))
		val = be32_to_cpu((__force __be32)val);
	return val;
}

static void brcmnand_bcma_write_reg(struct brcmnand_soc *soc, u32 val,
				    u32 offset)
{
	struct brcmnand_bcma_soc *sc = to_bcma_soc(soc);

	/* Offset into the NAND block */
	if (offset == BRCMNAND_NON_MMIO_FC_ADDR)
		offset = BCMA_CC_NAND_CACHE_DATA;
	else
		offset += BCMA_CC_NAND_REVISION;

	/* Swap if necessary */
	if (brcmnand_bcma_needs_swapping(offset))
		val = (__force u32)cpu_to_be32(val);

	bcma_cc_write32(sc->cc, offset, val);
}

static struct brcmnand_io_ops brcmnand_bcma_io_ops = {
	.read_reg	= brcmnand_bcma_read_reg,
	.write_reg	= brcmnand_bcma_write_reg,
};

static void brcmnand_bcma_prepare_data_bus(struct brcmnand_soc *soc, bool prepare,
					   bool is_param)
{
	struct brcmnand_bcma_soc *sc = to_bcma_soc(soc);

	/* Reset the cache address to ensure we are already accessing the
	 * beginning of a sub-page.
	 */
	bcma_cc_write32(sc->cc, BCMA_CC_NAND_CACHE_ADDR, 0);
}

static int brcmnand_bcma_nand_probe(struct platform_device *pdev)
{
	struct bcma_nflash *nflash = dev_get_platdata(&pdev->dev);
	struct brcmnand_bcma_soc *soc;

Annotation

Implementation Notes