drivers/mtd/nand/raw/mxc_nand.c
Source file repositories/reference/linux-study-clean/drivers/mtd/nand/raw/mxc_nand.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/mtd/nand/raw/mxc_nand.c- Extension
.c- Size
- 48723 bytes
- Lines
- 1842
- Domain
- Driver Families
- Bucket
- drivers/mtd
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/cleanup.hlinux/delay.hlinux/slab.hlinux/init.hlinux/module.hlinux/mtd/mtd.hlinux/mtd/rawnand.hlinux/mtd/partitions.hlinux/interrupt.hlinux/device.hlinux/platform_device.hlinux/clk.hlinux/err.hlinux/io.hlinux/irq.hlinux/completion.hlinux/of.hlinux/bitfield.h
Detected Declarations
struct mxc_nand_hoststruct mxc_nand_devtype_datastruct mxc_nand_hostfunction memcpy32_fromiofunction memcpy16_fromiofunction memcpy32_toiofunction memcpy16_toiofunction roundingfunction check_int_v3function check_int_v1_v2function irq_control_v1_v2function irq_control_v3function irq_controlfunction get_ecc_status_v1function get_ecc_status_v2_v3function get_ecc_status_v2function get_ecc_status_v3function mxc_nfc_irqfunction wait_op_donefunction send_cmd_v3function send_cmd_v1_v2function send_addr_v3function send_addr_v1_v2function send_page_v3function send_page_v2function send_page_v1function send_read_id_v3function send_read_id_v1_v2function get_dev_status_v3function get_dev_status_v1_v2function mxc_nand_enable_hwecc_v1_v2function mxc_nand_enable_hwecc_v3function mxc_nand_read_page_v1function mxc_nand_read_page_v2_v3function mxc_nand_read_pagefunction mxc_nand_read_page_rawfunction mxc_nand_read_oobfunction mxc_nand_write_page_eccfunction mxc_nand_write_page_rawfunction mxc_nand_write_oobfunction mxc_nand_select_chip_v1_v3function mxc_nand_select_chip_v2function mxc_v1_ooblayout_eccfunction mxc_v1_ooblayout_freefunction mxc_v2_ooblayout_eccfunction mxc_v2_ooblayout_freefunction get_eccsizefunction preset_v1
Annotated Snippet
struct mxc_nand_devtype_data {
void (*preset)(struct mtd_info *);
int (*read_page)(struct nand_chip *chip);
void (*send_cmd)(struct mxc_nand_host *, uint16_t, int);
void (*send_addr)(struct mxc_nand_host *, uint16_t, int);
void (*send_page)(struct mtd_info *, unsigned int);
void (*send_read_id)(struct mxc_nand_host *);
uint16_t (*get_dev_status)(struct mxc_nand_host *);
int (*check_int)(struct mxc_nand_host *);
void (*irq_control)(struct mxc_nand_host *, int);
u32 (*get_ecc_status)(struct nand_chip *);
const struct mtd_ooblayout_ops *ooblayout;
void (*select_chip)(struct nand_chip *chip, int cs);
int (*setup_interface)(struct nand_chip *chip, int csline,
const struct nand_interface_config *conf);
void (*enable_hwecc)(struct nand_chip *chip, bool enable);
/*
* On i.MX21 the CONFIG2:INT bit cannot be read if interrupts are masked
* (CONFIG1:INT_MSK is set). To handle this the driver uses
* enable_irq/disable_irq_nosync instead of CONFIG1:INT_MSK
*/
int irqpending_quirk;
int needs_ip;
size_t regs_offset;
size_t spare0_offset;
size_t axi_offset;
int spare_len;
int eccbytes;
int eccsize;
int ppb_shift;
};
struct mxc_nand_host {
struct nand_chip nand;
struct device *dev;
void __iomem *spare0;
void __iomem *main_area0;
void __iomem *base;
void __iomem *regs;
void __iomem *regs_axi;
void __iomem *regs_ip;
int status_request;
struct clk *clk;
int clk_act;
int irq;
int eccsize;
int used_oobsize;
int active_cs;
unsigned int ecc_stats_v1;
struct completion op_completion;
void *data_buf;
const struct mxc_nand_devtype_data *devtype_data;
};
static const char * const part_probes[] = {
"cmdlinepart", "RedBoot", "ofpart", NULL };
static void memcpy32_fromio(void *trg, const void __iomem *src, size_t size)
{
int i;
u32 *t = trg;
const __iomem u32 *s = src;
for (i = 0; i < (size >> 2); i++)
*t++ = __raw_readl(s++);
}
static void memcpy16_fromio(void *trg, const void __iomem *src, size_t size)
{
int i;
u16 *t = trg;
const __iomem u16 *s = src;
/* We assume that src (IO) is always 32bit aligned */
if (PTR_ALIGN(trg, 4) == trg && IS_ALIGNED(size, 4)) {
memcpy32_fromio(trg, src, size);
return;
}
for (i = 0; i < (size >> 1); i++)
*t++ = __raw_readw(s++);
}
Annotation
- Immediate include surface: `linux/cleanup.h`, `linux/delay.h`, `linux/slab.h`, `linux/init.h`, `linux/module.h`, `linux/mtd/mtd.h`, `linux/mtd/rawnand.h`, `linux/mtd/partitions.h`.
- Detected declarations: `struct mxc_nand_host`, `struct mxc_nand_devtype_data`, `struct mxc_nand_host`, `function memcpy32_fromio`, `function memcpy16_fromio`, `function memcpy32_toio`, `function memcpy16_toio`, `function rounding`, `function check_int_v3`, `function check_int_v1_v2`.
- Atlas domain: Driver Families / drivers/mtd.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.