drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
Source file repositories/reference/linux-study-clean/drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c- Extension
.c- Size
- 28102 bytes
- Lines
- 1030
- Domain
- Driver Families
- Bucket
- drivers/mtd
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hlinux/dma-mapping.hlinux/err.hlinux/init.hlinux/interrupt.hlinux/io.hlinux/iopoll.hlinux/module.hlinux/mtd/mtd.hlinux/mtd/partitions.hlinux/mtd/rawnand.hlinux/of.hlinux/platform_device.hlinux/slab.h
Detected Declarations
struct ma35_nand_chipstruct ma35_nand_infofunction ma35_ooblayout_eccfunction ma35_ooblayout_freefunction ma35_clear_sparefunction read_remaining_bytesfunction ma35_read_sparefunction ma35_write_sparefunction ma35_nand_target_enablefunction ma35_nand_hwecc_initfunction ma35_nfi_correctfunction ma35_nfi_ecc_checkfunction ma35_nand_dmac_initfunction ma35_nand_do_writefunction ma35_nand_do_readfunction ma35_nand_format_subpagefunction ma35_nand_write_subpage_hweccfunction ma35_nand_write_page_hweccfunction ma35_nand_read_subpage_hweccfunction ma35_nand_read_page_hweccfunction ma35_nand_read_oob_hweccfunction ma35_hw_initfunction ma35_nand_irqfunction ma35_nand_attach_chipfunction ma35_nfc_exec_instrfunction ma35_nfc_exec_opfunction ma35_nand_chip_initfunction ma35_chips_cleanupfunction list_for_each_entry_safefunction ma35_nand_chips_initfunction for_each_child_of_node_scopedfunction ma35_nand_probefunction ma35_nand_remove
Annotated Snippet
struct ma35_nand_chip {
struct list_head node;
struct nand_chip chip;
u32 eccstatus;
u8 nsels;
u8 sels[] __counted_by(nsels);
};
struct ma35_nand_info {
struct nand_controller controller;
struct device *dev;
void __iomem *regs;
int irq;
struct clk *clk;
struct completion complete;
struct list_head chips;
u8 *buffer;
unsigned long assigned_cs;
};
static inline struct ma35_nand_chip *to_ma35_nand(struct nand_chip *chip)
{
return container_of(chip, struct ma35_nand_chip, chip);
}
static int ma35_ooblayout_ecc(struct mtd_info *mtd, int section,
struct mtd_oob_region *oob_region)
{
struct nand_chip *chip = mtd_to_nand(mtd);
if (section)
return -ERANGE;
oob_region->length = chip->ecc.total;
oob_region->offset = mtd->oobsize - oob_region->length;
return 0;
}
static int ma35_ooblayout_free(struct mtd_info *mtd, int section,
struct mtd_oob_region *oob_region)
{
struct nand_chip *chip = mtd_to_nand(mtd);
if (section)
return -ERANGE;
oob_region->length = mtd->oobsize - chip->ecc.total - 2;
oob_region->offset = 2;
return 0;
}
static const struct mtd_ooblayout_ops ma35_ooblayout_ops = {
.free = ma35_ooblayout_free,
.ecc = ma35_ooblayout_ecc,
};
static inline void ma35_clear_spare(struct nand_chip *chip, int size)
{
struct ma35_nand_info *nand = nand_get_controller_data(chip);
int i;
for (i = 0; i < size / 4; i++)
writel(0xff, nand->regs + MA35_NFI_REG_NANDRA0);
}
static inline void read_remaining_bytes(struct ma35_nand_info *nand, u32 *buf,
u32 offset, int size, int swap)
{
u32 value = readl(nand->regs + MA35_NFI_REG_NANDRA0 + offset);
u8 *ptr = (u8 *)buf;
int i, shift;
for (i = 0; i < size; i++) {
shift = (swap ? 3 - i : i) * 8;
ptr[i] = (value >> shift) & 0xff;
}
}
static inline void ma35_read_spare(struct nand_chip *chip, int size, u32 *buf, u32 offset)
{
struct ma35_nand_info *nand = nand_get_controller_data(chip);
u32 off = round_down(offset, 4);
int len = offset % 4;
int i;
if (len) {
Annotation
- Immediate include surface: `linux/clk.h`, `linux/dma-mapping.h`, `linux/err.h`, `linux/init.h`, `linux/interrupt.h`, `linux/io.h`, `linux/iopoll.h`, `linux/module.h`.
- Detected declarations: `struct ma35_nand_chip`, `struct ma35_nand_info`, `function ma35_ooblayout_ecc`, `function ma35_ooblayout_free`, `function ma35_clear_spare`, `function read_remaining_bytes`, `function ma35_read_spare`, `function ma35_write_spare`, `function ma35_nand_target_enable`, `function ma35_nand_hwecc_init`.
- Atlas domain: Driver Families / drivers/mtd.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.