drivers/mtd/nand/raw/pasemi_nand.c
Source file repositories/reference/linux-study-clean/drivers/mtd/nand/raw/pasemi_nand.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/mtd/nand/raw/pasemi_nand.c- Extension
.c- Size
- 5683 bytes
- Lines
- 248
- Domain
- Driver Families
- Bucket
- drivers/mtd
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/slab.hlinux/module.hlinux/mtd/mtd.hlinux/mtd/rawnand.hlinux/of_address.hlinux/of_irq.hlinux/of_platform.hlinux/platform_device.hlinux/pci.hasm/io.h
Detected Declarations
struct pasemi_ddatafunction pasemi_read_buffunction pasemi_write_buffunction pasemi_hwcontrolfunction pasemi_device_readyfunction pasemi_attach_chipfunction pasemi_nand_probefunction pasemi_nand_remove
Annotated Snippet
struct pasemi_ddata {
struct nand_chip chip;
unsigned int lpcctl;
struct nand_controller controller;
};
static const char driver_name[] = "pasemi-nand";
static void pasemi_read_buf(struct nand_chip *chip, u_char *buf, int len)
{
while (len > 0x800) {
memcpy_fromio(buf, chip->legacy.IO_ADDR_R, 0x800);
buf += 0x800;
len -= 0x800;
}
memcpy_fromio(buf, chip->legacy.IO_ADDR_R, len);
}
static void pasemi_write_buf(struct nand_chip *chip, const u_char *buf,
int len)
{
while (len > 0x800) {
memcpy_toio(chip->legacy.IO_ADDR_R, buf, 0x800);
buf += 0x800;
len -= 0x800;
}
memcpy_toio(chip->legacy.IO_ADDR_R, buf, len);
}
static void pasemi_hwcontrol(struct nand_chip *chip, int cmd,
unsigned int ctrl)
{
struct pasemi_ddata *ddata = container_of(chip, struct pasemi_ddata, chip);
if (cmd == NAND_CMD_NONE)
return;
if (ctrl & NAND_CLE)
out_8(chip->legacy.IO_ADDR_W + (1 << CLE_PIN_CTL), cmd);
else
out_8(chip->legacy.IO_ADDR_W + (1 << ALE_PIN_CTL), cmd);
/* Push out posted writes */
eieio();
inl(ddata->lpcctl);
}
static int pasemi_device_ready(struct nand_chip *chip)
{
struct pasemi_ddata *ddata = container_of(chip, struct pasemi_ddata, chip);
return !!(inl(ddata->lpcctl) & LBICTRL_LPCCTL_NR);
}
static int pasemi_attach_chip(struct nand_chip *chip)
{
if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_SOFT &&
chip->ecc.algo == NAND_ECC_ALGO_UNKNOWN)
chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
return 0;
}
static const struct nand_controller_ops pasemi_ops = {
.attach_chip = pasemi_attach_chip,
};
static int pasemi_nand_probe(struct platform_device *ofdev)
{
struct device *dev = &ofdev->dev;
struct pci_dev *pdev;
struct device_node *np = dev->of_node;
struct resource res;
struct nand_chip *chip;
struct nand_controller *controller;
int err = 0;
struct pasemi_ddata *ddata;
struct mtd_info *pasemi_nand_mtd;
err = of_address_to_resource(np, 0, &res);
if (err)
return -EINVAL;
dev_dbg(dev, "pasemi_nand at %pR\n", &res);
/* Allocate memory for MTD device structure and private data */
ddata = kzalloc_obj(*ddata);
if (!ddata) {
err = -ENOMEM;
Annotation
- Immediate include surface: `linux/slab.h`, `linux/module.h`, `linux/mtd/mtd.h`, `linux/mtd/rawnand.h`, `linux/of_address.h`, `linux/of_irq.h`, `linux/of_platform.h`, `linux/platform_device.h`.
- Detected declarations: `struct pasemi_ddata`, `function pasemi_read_buf`, `function pasemi_write_buf`, `function pasemi_hwcontrol`, `function pasemi_device_ready`, `function pasemi_attach_chip`, `function pasemi_nand_probe`, `function pasemi_nand_remove`.
- Atlas domain: Driver Families / drivers/mtd.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.