drivers/mtd/nand/raw/renesas-nand-controller.c
Source file repositories/reference/linux-study-clean/drivers/mtd/nand/raw/renesas-nand-controller.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/mtd/nand/raw/renesas-nand-controller.c- Extension
.c- Size
- 39532 bytes
- Lines
- 1421
- Domain
- Driver Families
- Bucket
- drivers/mtd
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/clk.hlinux/dma-mapping.hlinux/interrupt.hlinux/iopoll.hlinux/module.hlinux/mtd/mtd.hlinux/mtd/rawnand.hlinux/of.hlinux/platform_device.hlinux/pm_runtime.hlinux/slab.h
Detected Declarations
struct rnand_chip_selstruct rnand_chipstruct rnandcstruct rnandc_opfunction to_rnandc_csfunction rnandc_dis_correctionfunction rnandc_en_correctionfunction rnandc_clear_statusfunction rnandc_dis_interruptsfunction rnandc_en_interruptsfunction rnandc_clear_fifofunction rnandc_select_targetfunction rnandc_trigger_opfunction rnandc_trigger_dmafunction rnandc_irq_handlerfunction rnandc_wait_end_of_opfunction rnandc_wait_end_of_iofunction rnandc_read_page_hw_eccfunction rnandc_read_subpage_hw_eccfunction rnandc_write_page_hw_eccfunction rnandc_write_subpage_hw_eccfunction rnandc_exec_opfunction rnandc_setup_interfacefunction rnandc_ooblayout_eccfunction rnandc_ooblayout_freefunction rnandc_hw_ecc_controller_initfunction rnandc_ecc_initfunction rnandc_attach_chipfunction rnandc_alloc_dma_buffunction list_for_each_entry_safefunction rnandc_chip_initfunction rnandc_chips_cleanupfunction list_for_each_entry_safefunction rnandc_chips_initfunction for_each_child_of_node_scopedfunction rnandc_probefunction rnandc_remove
Annotated Snippet
struct rnand_chip_sel {
unsigned int cs;
};
struct rnand_chip {
struct nand_chip chip;
struct list_head node;
int selected_die;
u32 ctrl;
unsigned int nsels;
u32 control;
u32 ecc_ctrl;
u32 timings_asyn;
u32 tim_seq0;
u32 tim_seq1;
u32 tim_gen_seq0;
u32 tim_gen_seq1;
u32 tim_gen_seq2;
u32 tim_gen_seq3;
struct rnand_chip_sel sels[] __counted_by(nsels);
};
struct rnandc {
struct nand_controller controller;
struct device *dev;
void __iomem *regs;
unsigned long ext_clk_rate;
unsigned long assigned_cs;
struct list_head chips;
struct nand_chip *selected_chip;
struct completion complete;
bool use_polling;
u8 *buf;
unsigned int buf_sz;
};
struct rnandc_op {
u32 command;
u32 addr0_col;
u32 addr0_row;
u32 addr1_col;
u32 addr1_row;
u32 data_size;
u32 ecc_offset;
u32 gen_seq_ctrl;
u8 *buf;
bool read;
unsigned int len;
};
static inline struct rnandc *to_rnandc(struct nand_controller *ctrl)
{
return container_of(ctrl, struct rnandc, controller);
}
static inline struct rnand_chip *to_rnand(struct nand_chip *chip)
{
return container_of(chip, struct rnand_chip, chip);
}
static inline unsigned int to_rnandc_cs(struct rnand_chip *nand)
{
return nand->sels[nand->selected_die].cs;
}
static void rnandc_dis_correction(struct rnandc *rnandc)
{
u32 control;
control = readl_relaxed(rnandc->regs + CONTROL_REG);
control &= ~CONTROL_ECC_EN;
writel_relaxed(control, rnandc->regs + CONTROL_REG);
}
static void rnandc_en_correction(struct rnandc *rnandc)
{
u32 control;
control = readl_relaxed(rnandc->regs + CONTROL_REG);
control |= CONTROL_ECC_EN;
writel_relaxed(control, rnandc->regs + CONTROL_REG);
}
static void rnandc_clear_status(struct rnandc *rnandc)
{
writel_relaxed(0, rnandc->regs + INT_STATUS_REG);
writel_relaxed(0, rnandc->regs + ECC_STAT_REG);
writel_relaxed(0, rnandc->regs + ECC_CNT_REG);
}
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/clk.h`, `linux/dma-mapping.h`, `linux/interrupt.h`, `linux/iopoll.h`, `linux/module.h`, `linux/mtd/mtd.h`, `linux/mtd/rawnand.h`.
- Detected declarations: `struct rnand_chip_sel`, `struct rnand_chip`, `struct rnandc`, `struct rnandc_op`, `function to_rnandc_cs`, `function rnandc_dis_correction`, `function rnandc_en_correction`, `function rnandc_clear_status`, `function rnandc_dis_interrupts`, `function rnandc_en_interrupts`.
- Atlas domain: Driver Families / drivers/mtd.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.