drivers/net/can/m_can/m_can.h

Source file repositories/reference/linux-study-clean/drivers/net/can/m_can/m_can.h

File Facts

System
Linux kernel
Corpus path
drivers/net/can/m_can/m_can.h
Extension
.h
Size
3609 bytes
Lines
147
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct mram_cfg {
	u16 off;
	u8  num;
};

struct m_can_classdev;
struct m_can_ops {
	/* Device specific call backs */
	int (*clear_interrupts)(struct m_can_classdev *cdev);
	u32 (*read_reg)(struct m_can_classdev *cdev, int reg);
	int (*write_reg)(struct m_can_classdev *cdev, int reg, int val);
	int (*read_fifo)(struct m_can_classdev *cdev, int addr_offset, void *val, size_t val_count);
	int (*write_fifo)(struct m_can_classdev *cdev, int addr_offset,
			  const void *val, size_t val_count);
	int (*init)(struct m_can_classdev *cdev);
	int (*deinit)(struct m_can_classdev *cdev);
};

struct m_can_tx_op {
	struct m_can_classdev *cdev;
	struct work_struct work;
	struct sk_buff *skb;
	bool submit;
};

struct m_can_classdev {
	struct can_priv can;
	struct can_rx_offload offload;
	struct napi_struct napi;
	struct net_device *net;
	struct device *dev;
	struct clk *hclk;
	struct clk *cclk;
	struct reset_control *rst;

	struct workqueue_struct *tx_wq;
	struct phy *transceiver;

	ktime_t irq_timer_wait;

	const struct m_can_ops *ops;

	int version;
	u32 irqstatus;

	int pm_clock_support;
	int pm_wake_source;
	int is_peripheral;
	bool irq_edge_triggered;

	// Cached M_CAN_IE register content
	u32 active_interrupts;
	u32 rx_max_coalesced_frames_irq;
	u32 rx_coalesce_usecs_irq;
	u32 tx_max_coalesced_frames;
	u32 tx_max_coalesced_frames_irq;
	u32 tx_coalesce_usecs_irq;

	// Store this internally to avoid fetch delays on peripheral chips
	u32 tx_fifo_putidx;

	/* Protects shared state between start_xmit and m_can_isr */
	spinlock_t tx_handling_spinlock;
	int tx_fifo_in_flight;

	struct m_can_tx_op *tx_ops;
	int tx_fifo_size;
	int next_tx_op;

	int nr_txs_without_submit;
	/* bitfield of fifo elements that will be submitted together */
	u32 tx_peripheral_submit;

	struct mram_cfg mcfg[MRAM_CFG_NUM];

	struct hrtimer hrtimer;

	struct pinctrl *pinctrl;
	struct pinctrl_state *pinctrl_state_wakeup;
};

struct m_can_classdev *m_can_class_allocate_dev(struct device *dev, int sizeof_priv);
void m_can_class_free_dev(struct net_device *net);
int m_can_class_register(struct m_can_classdev *cdev);
void m_can_class_unregister(struct m_can_classdev *cdev);
int m_can_class_get_clocks(struct m_can_classdev *cdev);
int m_can_check_mram_cfg(struct m_can_classdev *cdev, u32 mram_max_size);

int m_can_class_suspend(struct device *dev);
int m_can_class_resume(struct device *dev);

Annotation

Implementation Notes