drivers/net/dsa/lantiq/mxl-gsw1xx.c
Source file repositories/reference/linux-study-clean/drivers/net/dsa/lantiq/mxl-gsw1xx.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/dsa/lantiq/mxl-gsw1xx.c- Extension
.c- Size
- 26530 bytes
- Lines
- 941
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bits.hlinux/delay.hlinux/jiffies.hlinux/module.hlinux/of_device.hlinux/of_mdio.hlinux/phy/phy-common-props.hlinux/property.hlinux/regmap.hlinux/workqueue.hnet/dsa.hlantiq_gswip.hmxl-gsw1xx.hmxl-gsw1xx_pce.h
Detected Declarations
struct gsw1xx_privfunction gsw1xx_config_smdio_badrfunction gsw1xx_regmap_readfunction gsw1xx_regmap_writefunction gsw1xx_mdio_regmap_lockfunction gsw1xx_mdio_regmap_unlockfunction gsw1xx_pcs_inband_capsfunction gsw1xx_pcs_enablefunction gsw1xx_pcs_disablefunction gsw1xx_pcs_get_statefunction gsw1xx_pcs_phy_xaui_writefunction gsw1xx_pcs_resetfunction gsw1xx_pcs_configfunction gsw1xx_pcs_clear_ranegfunction gsw1xx_pcs_an_restartfunction gsw1xx_pcs_link_upfunction gsw1xx_phylink_get_lpi_capsfunction gsw1xx_phylink_get_capsfunction gsw150_phylink_get_capsfunction gsw1xx_rmii_slew_ratefunction gsw1xx_port_setupfunction gsw1xx_serdes_pcs_initfunction gsw1xx_probefunction gsw1xx_removefunction gsw1xx_shutdown
Annotated Snippet
struct gsw1xx_priv {
struct mdio_device *mdio_dev;
int smdio_badr;
struct regmap *sgmii;
struct regmap *gpio;
struct regmap *clk;
struct regmap *shell;
struct phylink_pcs pcs;
struct delayed_work clear_raneg;
phy_interface_t tbi_interface;
struct gswip_priv gswip;
};
static int gsw1xx_config_smdio_badr(struct gsw1xx_priv *priv,
unsigned int reg)
{
struct mii_bus *bus = priv->mdio_dev->bus;
int sw_addr = priv->mdio_dev->addr;
int smdio_badr = priv->smdio_badr;
int res;
if (smdio_badr == GSW1XX_SMDIO_BADR_UNKNOWN ||
reg - smdio_badr >= GSW1XX_SMDIO_BADR ||
smdio_badr > reg) {
/* Configure the Switch Base Address */
smdio_badr = reg & ~GENMASK(3, 0);
res = __mdiobus_write(bus, sw_addr, GSW1XX_SMDIO_BADR, smdio_badr);
if (res < 0) {
dev_err(&priv->mdio_dev->dev,
"%s: Error %d, configuring switch base\n",
__func__, res);
return res;
}
priv->smdio_badr = smdio_badr;
}
return smdio_badr;
}
static int gsw1xx_regmap_read(void *context, unsigned int reg,
unsigned int *val)
{
struct gsw1xx_priv *priv = context;
struct mii_bus *bus = priv->mdio_dev->bus;
int sw_addr = priv->mdio_dev->addr;
int smdio_badr;
int res;
smdio_badr = gsw1xx_config_smdio_badr(priv, reg);
if (smdio_badr < 0)
return smdio_badr;
res = __mdiobus_read(bus, sw_addr, reg - smdio_badr);
if (res < 0) {
dev_err(&priv->mdio_dev->dev, "%s: Error %d reading 0x%x\n",
__func__, res, reg);
return res;
}
*val = res;
return 0;
}
static int gsw1xx_regmap_write(void *context, unsigned int reg,
unsigned int val)
{
struct gsw1xx_priv *priv = context;
struct mii_bus *bus = priv->mdio_dev->bus;
int sw_addr = priv->mdio_dev->addr;
int smdio_badr;
int res;
smdio_badr = gsw1xx_config_smdio_badr(priv, reg);
if (smdio_badr < 0)
return smdio_badr;
res = __mdiobus_write(bus, sw_addr, reg - smdio_badr, val);
if (res < 0)
dev_err(&priv->mdio_dev->dev,
"%s: Error %d, writing 0x%x:0x%x\n", __func__, res, reg,
val);
return res;
}
static const struct regmap_bus gsw1xx_regmap_bus = {
.reg_write = gsw1xx_regmap_write,
.reg_read = gsw1xx_regmap_read,
};
Annotation
- Immediate include surface: `linux/bits.h`, `linux/delay.h`, `linux/jiffies.h`, `linux/module.h`, `linux/of_device.h`, `linux/of_mdio.h`, `linux/phy/phy-common-props.h`, `linux/property.h`.
- Detected declarations: `struct gsw1xx_priv`, `function gsw1xx_config_smdio_badr`, `function gsw1xx_regmap_read`, `function gsw1xx_regmap_write`, `function gsw1xx_mdio_regmap_lock`, `function gsw1xx_mdio_regmap_unlock`, `function gsw1xx_pcs_inband_caps`, `function gsw1xx_pcs_enable`, `function gsw1xx_pcs_disable`, `function gsw1xx_pcs_get_state`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.