drivers/net/dsa/lantiq/mxl-gsw1xx_pce.h
Source file repositories/reference/linux-study-clean/drivers/net/dsa/lantiq/mxl-gsw1xx_pce.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/dsa/lantiq/mxl-gsw1xx_pce.h- Extension
.h- Size
- 6114 bytes
- Lines
- 155
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
lantiq_gswip.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#include "lantiq_gswip.h"
#define INSTR 0
#define IPV6 1
#define LENACCU 2
/* GSWIP_2.X */
enum {
OUT_MAC0 = 0,
OUT_MAC1,
OUT_MAC2,
OUT_MAC3,
OUT_MAC4,
OUT_MAC5,
OUT_ETHTYP,
OUT_VTAG0,
OUT_VTAG1,
OUT_ITAG0,
OUT_ITAG1, /* 10 */
OUT_ITAG2,
OUT_ITAG3,
OUT_IP0,
OUT_IP1,
OUT_IP2,
OUT_IP3,
OUT_SIP0,
OUT_SIP1,
OUT_SIP2,
OUT_SIP3, /* 20 */
OUT_SIP4,
OUT_SIP5,
OUT_SIP6,
OUT_SIP7,
OUT_DIP0,
OUT_DIP1,
OUT_DIP2,
OUT_DIP3,
OUT_DIP4,
OUT_DIP5, /* 30 */
OUT_DIP6,
OUT_DIP7,
OUT_SESID,
OUT_PROT,
OUT_APP0,
OUT_APP1,
OUT_IGMP0,
OUT_IGMP1,
OUT_STAG0 = 61,
OUT_STAG1 = 62,
OUT_NONE = 63,
};
/* parser's microcode flag type */
enum {
FLAG_ITAG = 0,
FLAG_VLAN,
FLAG_SNAP,
FLAG_PPPOE,
FLAG_IPV6,
FLAG_IPV6FL,
FLAG_IPV4,
FLAG_IGMP,
FLAG_TU,
FLAG_HOP,
FLAG_NN1, /* 10 */
FLAG_NN2,
FLAG_END,
FLAG_NO, /* 13 */
FLAG_SVLAN, /* 14 */
};
#define PCE_MC_M(val, msk, ns, out, len, type, flags, ipv4_len) \
{ (val), (msk), ((ns) << 10 | (out) << 4 | (len) >> 1),\
((len) & 1) << 15 | (type) << 13 | (flags) << 9 | (ipv4_len) << 8 }
/* V22_2X (IPv6 issue fixed) */
static const struct gswip_pce_microcode gsw1xx_pce_microcode[] = {
/* value mask ns fields L type flags ipv4_len */
PCE_MC_M(0x88c3, 0xFFFF, 1, OUT_ITAG0, 4, INSTR, FLAG_ITAG, 0),
PCE_MC_M(0x8100, 0xFFFF, 4, OUT_STAG0, 2, INSTR, FLAG_SVLAN, 0),
PCE_MC_M(0x88A8, 0xFFFF, 4, OUT_STAG0, 2, INSTR, FLAG_SVLAN, 0),
PCE_MC_M(0x9100, 0xFFFF, 4, OUT_STAG0, 2, INSTR, FLAG_SVLAN, 0),
PCE_MC_M(0x8100, 0xFFFF, 5, OUT_VTAG0, 2, INSTR, FLAG_VLAN, 0),
PCE_MC_M(0x88A8, 0xFFFF, 6, OUT_VTAG0, 2, INSTR, FLAG_VLAN, 0),
PCE_MC_M(0x9100, 0xFFFF, 4, OUT_VTAG0, 2, INSTR, FLAG_VLAN, 0),
PCE_MC_M(0x8864, 0xFFFF, 20, OUT_ETHTYP, 1, INSTR, FLAG_NO, 0),
PCE_MC_M(0x0800, 0xFFFF, 24, OUT_ETHTYP, 1, INSTR, FLAG_NO, 0),
PCE_MC_M(0x86DD, 0xFFFF, 25, OUT_ETHTYP, 1, INSTR, FLAG_NO, 0),
PCE_MC_M(0x8863, 0xFFFF, 19, OUT_ETHTYP, 1, INSTR, FLAG_NO, 0),
PCE_MC_M(0x0000, 0xF800, 13, OUT_NONE, 0, INSTR, FLAG_NO, 0),
Annotation
- Immediate include surface: `lantiq_gswip.h`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.