drivers/net/dsa/mt7530.h

Source file repositories/reference/linux-study-clean/drivers/net/dsa/mt7530.h

File Facts

System
Linux kernel
Corpus path
drivers/net/dsa/mt7530.h
Extension
.h
Size
29785 bytes
Lines
953
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct mt7530_mib_desc {
	unsigned int size;
	unsigned int offset;
	const char *name;
};

struct mt7530_fdb {
	u16 vid;
	u8 port_mask;
	u8 aging;
	u8 mac[6];
	bool noarp;
};

/* struct mt7530_port -	This is the main data structure for holding the state
 *			of the port.
 * @enable:	The status used for show port is enabled or not.
 * @pm:		The matrix used to show all connections with the port.
 * @pvid:	The VLAN specified is to be considered a PVID at ingress.  Any
 *		untagged frames will be assigned to the related VLAN.
 * @sgmii_pcs:	Pointer to PCS instance for SerDes ports
 * @stats:	Cached port statistics for MDIO-connected switches
 */
struct mt7530_port {
	bool enable;
	bool isolated;
	u32 pm;
	u16 pvid;
	struct phylink_pcs *sgmii_pcs;
	struct rtnl_link_stats64 stats;
};

/* Port 5 mode definitions of the MT7530 switch */
enum mt7530_p5_mode {
	GMAC5,
	MUX_PHY_P0,
	MUX_PHY_P4,
};

struct mt7530_priv;

struct mt753x_pcs {
	struct phylink_pcs pcs;
	struct mt7530_priv *priv;
	int port;
};

/* struct mt753x_info -	This is the main data structure for holding the specific
 *			part for each supported device
 * @id:			Holding the identifier to a switch model
 * @pcs_ops:		Holding the pointer to the MAC PCS operations structure
 * @sw_setup:		Holding the handler to a device initialization
 * @phy_read_c22:	Holding the way reading PHY port using C22
 * @phy_write_c22:	Holding the way writing PHY port using C22
 * @phy_read_c45:	Holding the way reading PHY port using C45
 * @phy_write_c45:	Holding the way writing PHY port using C45
 * @mac_port_get_caps:	Holding the handler that provides MAC capabilities
 * @mac_port_config:	Holding the way setting up the PHY attribute to a
 *			certain MAC port
 */
struct mt753x_info {
	enum mt753x_id id;

	const struct phylink_pcs_ops *pcs_ops;

	int (*sw_setup)(struct dsa_switch *ds);
	int (*phy_read_c22)(struct mt7530_priv *priv, int port, int regnum);
	int (*phy_write_c22)(struct mt7530_priv *priv, int port, int regnum,
			     u16 val);
	int (*phy_read_c45)(struct mt7530_priv *priv, int port, int devad,
			    int regnum);
	int (*phy_write_c45)(struct mt7530_priv *priv, int port, int devad,
			     int regnum, u16 val);
	void (*mac_port_get_caps)(struct dsa_switch *ds, int port,
				  struct phylink_config *config);
	void (*mac_port_config)(struct dsa_switch *ds, int port,
				unsigned int mode,
				phy_interface_t interface);
};

/* struct mt7530_priv -	This is the main data structure for holding the state
 *			of the driver
 * @dev:		The device pointer
 * @ds:			The pointer to the dsa core structure
 * @bus:		The bus used for the device and built-in PHY
 * @regmap:		The regmap instance representing all switch registers
 * @rstc:		The pointer to reset control used by MCM
 * @core_pwr:		The power supplied into the core
 * @io_pwr:		The power supplied into the I/O
 * @reset:		The descriptor for GPIO line tied to its reset pin

Annotation

Implementation Notes