drivers/net/dsa/mv88e6xxx/chip.c
Source file repositories/reference/linux-study-clean/drivers/net/dsa/mv88e6xxx/chip.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/dsa/mv88e6xxx/chip.c- Extension
.c- Size
- 220431 bytes
- Lines
- 7537
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/delay.hlinux/dsa/mv88e6xxx.hlinux/etherdevice.hlinux/ethtool.hlinux/if_bridge.hlinux/interrupt.hlinux/irq.hlinux/irqdomain.hlinux/jiffies.hlinux/list.hlinux/mdio.hlinux/module.hlinux/of.hlinux/of_irq.hlinux/of_mdio.hlinux/platform_data/mv88e6xxx.hlinux/property.hlinux/netdevice.hlinux/gpio/consumer.hlinux/phylink.hnet/dsa.hchip.hdevlink.hglobal1.hglobal2.hhwtstamp.hphy.hport.hptp.hserdes.hsmi.h
Detected Declarations
struct mv88e6xxx_port_broadcast_sync_ctxstruct mv88e6xxx_port_db_dump_vlan_ctxenum mv88e6xxx_hw_stat_idfunction Copyrightfunction mv88e6xxx_readfunction mv88e6xxx_writefunction mv88e6xxx_wait_maskfunction mv88e6xxx_wait_bitfunction mv88e6xxx_g1_irq_maskfunction mv88e6xxx_g1_irq_unmaskfunction mv88e6xxx_g1_irq_thread_workfunction mv88e6xxx_g1_irq_thread_fnfunction mv88e6xxx_g1_irq_bus_lockfunction mv88e6xxx_g1_irq_bus_sync_unlockfunction mv88e6xxx_g1_irq_domain_mapfunction mv88e6xxx_g1_irq_free_commonfunction mv88e6xxx_g1_irq_freefunction mv88e6xxx_g1_irq_setup_commonfunction mv88e6xxx_g1_irq_setupfunction mv88e6xxx_irq_pollfunction mv88e6xxx_irq_poll_setupfunction mv88e6xxx_irq_poll_freefunction mv88e6xxx_port_config_interfacefunction mv88e6xxx_port_setup_macfunction mv88e6xxx_phy_is_internalfunction mv88e6xxx_port_ppu_updatesfunction mv88e6095_phylink_get_capsfunction mv88e6185_phylink_get_capsfunction mv88e6xxx_translate_cmodefunction mv88e6250_setup_supported_interfacesfunction mv88e6250_phylink_get_capsfunction mv88e6351_phylink_get_capsfunction mv88e63xx_get_port_serdes_cmodefunction mv88e6352_phylink_get_capsfunction mv88e632x_phylink_get_capsfunction mv88e6341_phylink_get_capsfunction mv88e6390_phylink_get_capsfunction mv88e6390x_phylink_get_capsfunction mv88e6393x_phylink_get_capsfunction mv88e6xxx_get_capsfunction mv88e6xxx_mac_select_pcsfunction mv88e6xxx_mac_preparefunction mv88e6xxx_mac_configfunction mv88e6xxx_mac_finishfunction mv88e6xxx_mac_link_downfunction mv88e6xxx_mac_link_upfunction mv88e6xxx_stats_snapshotfunction _mv88e6xxx_get_ethtool_stat
Annotated Snippet
struct mv88e6xxx_port_broadcast_sync_ctx {
int port;
bool flood;
};
static int
mv88e6xxx_port_broadcast_sync_vlan(struct mv88e6xxx_chip *chip,
const struct mv88e6xxx_vtu_entry *vlan,
void *_ctx)
{
struct mv88e6xxx_port_broadcast_sync_ctx *ctx = _ctx;
u8 broadcast[ETH_ALEN];
u8 state;
if (ctx->flood)
state = MV88E6XXX_G1_ATU_DATA_STATE_MC_STATIC;
else
state = MV88E6XXX_G1_ATU_DATA_STATE_MC_UNUSED;
eth_broadcast_addr(broadcast);
return mv88e6xxx_port_db_load_purge(chip, ctx->port, broadcast,
vlan->vid, state);
}
static int mv88e6xxx_port_broadcast_sync(struct mv88e6xxx_chip *chip, int port,
bool flood)
{
struct mv88e6xxx_port_broadcast_sync_ctx ctx = {
.port = port,
.flood = flood,
};
struct mv88e6xxx_vtu_entry vid0 = {
.vid = 0,
};
int err;
/* Update the port's private database... */
err = mv88e6xxx_port_broadcast_sync_vlan(chip, &vid0, &ctx);
if (err)
return err;
/* ...and the database for all VLANs. */
return mv88e6xxx_vtu_walk(chip, mv88e6xxx_port_broadcast_sync_vlan,
&ctx);
}
static int mv88e6xxx_port_vlan_join(struct mv88e6xxx_chip *chip, int port,
u16 vid, u8 member, bool warn)
{
const u8 non_member = MV88E6XXX_G1_VTU_DATA_MEMBER_TAG_NON_MEMBER;
struct mv88e6xxx_vtu_entry vlan;
int i, err;
err = mv88e6xxx_vtu_get(chip, vid, &vlan);
if (err)
return err;
if (!vlan.valid) {
memset(&vlan, 0, sizeof(vlan));
if (vid == MV88E6XXX_VID_STANDALONE)
vlan.policy = true;
err = mv88e6xxx_atu_new(chip, &vlan.fid);
if (err)
return err;
for (i = 0; i < mv88e6xxx_num_ports(chip); ++i)
if (i == port)
vlan.member[i] = member;
else
vlan.member[i] = non_member;
vlan.vid = vid;
vlan.valid = true;
err = mv88e6xxx_vtu_loadpurge(chip, &vlan);
if (err)
return err;
err = mv88e6xxx_broadcast_setup(chip, vlan.vid);
if (err)
return err;
} else if (vlan.member[port] != member) {
vlan.member[port] = member;
err = mv88e6xxx_vtu_loadpurge(chip, &vlan);
if (err)
return err;
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/delay.h`, `linux/dsa/mv88e6xxx.h`, `linux/etherdevice.h`, `linux/ethtool.h`, `linux/if_bridge.h`, `linux/interrupt.h`, `linux/irq.h`.
- Detected declarations: `struct mv88e6xxx_port_broadcast_sync_ctx`, `struct mv88e6xxx_port_db_dump_vlan_ctx`, `enum mv88e6xxx_hw_stat_id`, `function Copyright`, `function mv88e6xxx_read`, `function mv88e6xxx_write`, `function mv88e6xxx_wait_mask`, `function mv88e6xxx_wait_bit`, `function mv88e6xxx_g1_irq_mask`, `function mv88e6xxx_g1_irq_unmask`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.