drivers/net/dsa/mv88e6xxx/global1_atu.c
Source file repositories/reference/linux-study-clean/drivers/net/dsa/mv88e6xxx/global1_atu.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/dsa/mv88e6xxx/global1_atu.c- Extension
.c- Size
- 11567 bytes
- Lines
- 502
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/interrupt.hlinux/irqdomain.hchip.hglobal1.hswitchdev.htrace.h
Detected Declarations
function Unitfunction mv88e6xxx_g1_atu_set_learn2allfunction mv88e6xxx_g1_atu_set_age_timefunction mv88e6165_g1_atu_get_hashfunction mv88e6165_g1_atu_set_hashfunction mv88e6xxx_g1_atu_op_waitfunction mv88e6xxx_g1_read_atu_violationfunction mv88e6xxx_g1_atu_opfunction mv88e6xxx_g1_atu_get_nextfunction mv88e6xxx_g1_atu_fid_readfunction mv88e6xxx_g1_atu_data_readfunction mv88e6xxx_g1_atu_data_writefunction mv88e6xxx_g1_atu_mac_readfunction mv88e6xxx_g1_atu_mac_writefunction mv88e6xxx_g1_atu_getnextfunction mv88e6xxx_g1_atu_loadpurgefunction mv88e6xxx_g1_atu_flushmovefunction mv88e6xxx_g1_atu_flushfunction mv88e6xxx_g1_atu_movefunction mv88e6xxx_g1_atu_removefunction mv88e6xxx_g1_atu_prob_irq_thread_fnfunction mv88e6xxx_g1_atu_prob_irq_setupfunction mv88e6xxx_g1_atu_prob_irq_free
Annotated Snippet
if (mv88e6xxx_num_databases(chip) > 64) {
/* ATU DBNum[7:4] are located in ATU Control 15:12 */
err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_CTL,
&val);
if (err)
return err;
val = (val & 0x0fff) | ((fid << 8) & 0xf000);
err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_CTL,
val);
if (err)
return err;
} else if (mv88e6xxx_num_databases(chip) > 16) {
/* ATU DBNum[5:4] are located in ATU Operation 9:8 */
op |= (fid & 0x30) << 4;
}
/* ATU DBNum[3:0] are located in ATU Operation 3:0 */
op |= fid & 0xf;
}
err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_OP,
MV88E6XXX_G1_ATU_OP_BUSY | op);
if (err)
return err;
return mv88e6xxx_g1_atu_op_wait(chip);
}
int mv88e6xxx_g1_atu_get_next(struct mv88e6xxx_chip *chip, u16 fid)
{
return mv88e6xxx_g1_atu_op(chip, fid, MV88E6XXX_G1_ATU_OP_GET_NEXT_DB);
}
static int mv88e6xxx_g1_atu_fid_read(struct mv88e6xxx_chip *chip, u16 *fid)
{
u16 val = 0, upper = 0, op = 0;
int err = -EOPNOTSUPP;
if (mv88e6xxx_num_databases(chip) > 256) {
err = mv88e6xxx_g1_read(chip, MV88E6352_G1_ATU_FID, &val);
val &= 0xfff;
if (err)
return err;
} else {
err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_OP, &op);
if (err)
return err;
if (mv88e6xxx_num_databases(chip) > 64) {
/* ATU DBNum[7:4] are located in ATU Control 15:12 */
err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_CTL,
&upper);
if (err)
return err;
upper = (upper >> 8) & 0x00f0;
} else if (mv88e6xxx_num_databases(chip) > 16) {
/* ATU DBNum[5:4] are located in ATU Operation 9:8 */
upper = (op >> 4) & 0x30;
}
/* ATU DBNum[3:0] are located in ATU Operation 3:0 */
val = (op & 0xf) | upper;
}
*fid = val;
return err;
}
/* Offset 0x0C: ATU Data Register */
static int mv88e6xxx_g1_atu_data_read(struct mv88e6xxx_chip *chip,
struct mv88e6xxx_atu_entry *entry)
{
u16 val;
int err;
err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_DATA, &val);
if (err)
return err;
entry->state = val & 0xf;
if (entry->state) {
entry->trunk = !!(val & MV88E6XXX_G1_ATU_DATA_TRUNK);
entry->portvec = (val >> 4) & mv88e6xxx_port_mask(chip);
}
return 0;
}
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/interrupt.h`, `linux/irqdomain.h`, `chip.h`, `global1.h`, `switchdev.h`, `trace.h`.
- Detected declarations: `function Unit`, `function mv88e6xxx_g1_atu_set_learn2all`, `function mv88e6xxx_g1_atu_set_age_time`, `function mv88e6165_g1_atu_get_hash`, `function mv88e6165_g1_atu_set_hash`, `function mv88e6xxx_g1_atu_op_wait`, `function mv88e6xxx_g1_read_atu_violation`, `function mv88e6xxx_g1_atu_op`, `function mv88e6xxx_g1_atu_get_next`, `function mv88e6xxx_g1_atu_fid_read`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.