drivers/net/dsa/mv88e6xxx/global2.c
Source file repositories/reference/linux-study-clean/drivers/net/dsa/mv88e6xxx/global2.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/dsa/mv88e6xxx/global2.c- Extension
.c- Size
- 28922 bytes
- Lines
- 1218
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/interrupt.hlinux/irqdomain.hchip.hglobal1.hglobal2.h
Detected Declarations
function Copyrightfunction mv88e6xxx_g2_writefunction mv88e6xxx_g2_wait_bitfunction mv88e6xxx_g2_int_sourcefunction mv88e6xxx_g2_int_maskfunction mv88e6xxx_g2_mgmt_enable_2xfunction mv88e6xxx_g2_mgmt_enable_0xfunction mv88e6xxx_g2_switch_mgmt_rsvd2cpufunction mv88e6185_g2_mgmt_rsvd2cpufunction mv88e6352_g2_mgmt_rsvd2cpufunction mv88e6xxx_g2_device_mapping_writefunction mv88e6xxx_g2_trunk_mask_writefunction mv88e6xxx_g2_trunk_mapping_writefunction mv88e6xxx_g2_trunk_clearfunction mv88e6xxx_g2_irl_waitfunction mv88e6xxx_g2_irl_opfunction mv88e6352_g2_irl_init_allfunction mv88e6390_g2_irl_init_allfunction mv88e6xxx_g2_pvt_op_waitfunction mv88e6xxx_g2_pvt_opfunction mv88e6xxx_g2_pvt_readfunction mv88e6xxx_g2_pvt_writefunction mv88e6xxx_g2_switch_mac_writefunction mv88e6xxx_g2_set_switch_macfunction mv88e6xxx_g2_atu_stats_setfunction mv88e6xxx_g2_atu_stats_getfunction mv88e6xxx_g2_pot_writefunction mv88e6xxx_g2_pot_clearfunction mv88e6xxx_g2_eeprom_waitfunction mv88e6xxx_g2_eeprom_cmdfunction mv88e6xxx_g2_eeprom_read8function mv88e6xxx_g2_eeprom_write8function mv88e6xxx_g2_eeprom_read16function mv88e6xxx_g2_eeprom_write16function mv88e6xxx_g2_get_eeprom8function mv88e6xxx_g2_set_eeprom8function mv88e6xxx_g2_get_eeprom16function mv88e6xxx_g2_set_eeprom16function mv88e6xxx_g2_smi_phy_waitfunction mv88e6xxx_g2_smi_phy_cmdfunction mv88e6xxx_g2_smi_phy_accessfunction mv88e6xxx_g2_smi_phy_access_c22function mv88e6xxx_g2_smi_phy_read_data_c22function mv88e6xxx_g2_smi_phy_write_data_c22function mv88e6xxx_g2_smi_phy_access_c45function mv88e6xxx_g2_smi_phy_write_addr_c45function mv88e6xxx_g2_smi_phy_read_data_c45function _mv88e6xxx_g2_smi_phy_read_c45
Annotated Snippet
if (reg & (1 << n)) {
sub_irq = irq_find_mapping(chip->g2_irq.domain, n);
handle_nested_irq(sub_irq);
++nhandled;
}
}
out:
return (nhandled > 0 ? IRQ_HANDLED : IRQ_NONE);
}
static void mv88e6xxx_g2_irq_bus_lock(struct irq_data *d)
{
struct mv88e6xxx_chip *chip = irq_data_get_irq_chip_data(d);
mv88e6xxx_reg_lock(chip);
}
static void mv88e6xxx_g2_irq_bus_sync_unlock(struct irq_data *d)
{
struct mv88e6xxx_chip *chip = irq_data_get_irq_chip_data(d);
int err;
err = mv88e6xxx_g2_int_mask(chip, ~chip->g2_irq.masked);
if (err)
dev_err(chip->dev, "failed to mask interrupts\n");
mv88e6xxx_reg_unlock(chip);
}
static const struct irq_chip mv88e6xxx_g2_irq_chip = {
.name = "mv88e6xxx-g2",
.irq_mask = mv88e6xxx_g2_irq_mask,
.irq_unmask = mv88e6xxx_g2_irq_unmask,
.irq_bus_lock = mv88e6xxx_g2_irq_bus_lock,
.irq_bus_sync_unlock = mv88e6xxx_g2_irq_bus_sync_unlock,
};
static int mv88e6xxx_g2_irq_domain_map(struct irq_domain *d,
unsigned int irq,
irq_hw_number_t hwirq)
{
struct mv88e6xxx_chip *chip = d->host_data;
irq_set_chip_data(irq, d->host_data);
irq_set_chip_and_handler(irq, &chip->g2_irq.chip, handle_level_irq);
irq_set_noprobe(irq);
return 0;
}
static const struct irq_domain_ops mv88e6xxx_g2_irq_domain_ops = {
.map = mv88e6xxx_g2_irq_domain_map,
.xlate = irq_domain_xlate_twocell,
};
void mv88e6xxx_g2_irq_free(struct mv88e6xxx_chip *chip)
{
int irq, virq;
mv88e6xxx_g2_watchdog_free(chip);
free_irq(chip->device_irq, chip);
irq_dispose_mapping(chip->device_irq);
for (irq = 0; irq < 16; irq++) {
virq = irq_find_mapping(chip->g2_irq.domain, irq);
irq_dispose_mapping(virq);
}
irq_domain_remove(chip->g2_irq.domain);
}
int mv88e6xxx_g2_irq_setup(struct mv88e6xxx_chip *chip)
{
int err, irq, virq;
chip->g2_irq.masked = ~0;
mv88e6xxx_reg_lock(chip);
err = mv88e6xxx_g2_int_mask(chip, ~chip->g2_irq.masked);
mv88e6xxx_reg_unlock(chip);
if (err)
return err;
chip->g2_irq.domain = irq_domain_create_simple(dev_fwnode(chip->dev), 16, 0,
&mv88e6xxx_g2_irq_domain_ops, chip);
if (!chip->g2_irq.domain)
return -ENOMEM;
for (irq = 0; irq < 16; irq++)
irq_create_mapping(chip->g2_irq.domain, irq);
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/interrupt.h`, `linux/irqdomain.h`, `chip.h`, `global1.h`, `global2.h`.
- Detected declarations: `function Copyright`, `function mv88e6xxx_g2_write`, `function mv88e6xxx_g2_wait_bit`, `function mv88e6xxx_g2_int_source`, `function mv88e6xxx_g2_int_mask`, `function mv88e6xxx_g2_mgmt_enable_2x`, `function mv88e6xxx_g2_mgmt_enable_0x`, `function mv88e6xxx_g2_switch_mgmt_rsvd2cpu`, `function mv88e6185_g2_mgmt_rsvd2cpu`, `function mv88e6352_g2_mgmt_rsvd2cpu`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.