drivers/net/dsa/netc/netc_switch.h
Source file repositories/reference/linux-study-clean/drivers/net/dsa/netc/netc_switch.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/dsa/netc/netc_switch.h- Extension
.h- Size
- 5633 bytes
- Lines
- 207
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/dsa/tag_netc.hlinux/fsl/netc_global.hlinux/fsl/ntmp.hlinux/of_device.hlinux/of_net.hlinux/pci.hnetc_switch_hw.h
Detected Declarations
struct netc_switchstruct netc_switch_infostruct netc_port_capsstruct netc_portstruct netc_switch_regsstruct netc_fdb_entrystruct netc_vlan_entrystruct netc_port_statstruct netc_switchenum netc_host_reasonfunction is_netc_pseudo_portfunction netc_add_fdb_entryfunction netc_del_fdb_entryfunction netc_add_vlan_entryfunction netc_del_vlan_entry
Annotated Snippet
struct netc_switch_info {
u32 num_ports;
void (*phylink_get_caps)(int port, struct phylink_config *config);
};
struct netc_port_caps {
u32 half_duplex:1; /* indicates whether the port support half-duplex */
u32 pmac:1; /* indicates whether the port has preemption MAC */
u32 pseudo_link:1;
};
enum netc_host_reason {
/* Software defined host reasons */
NETC_HR_HOST_FLOOD = 8,
};
struct netc_port {
void __iomem *iobase;
struct netc_switch *switch_priv;
struct netc_port_caps caps;
struct dsa_port *dp;
struct clk *ref_clk; /* RGMII/RMII reference clock */
struct mii_bus *emdio;
int ett_offset;
u16 enable:1;
u16 uc:1;
u16 mc:1;
u16 pvid;
struct ipft_entry_data *host_flood;
};
struct netc_switch_regs {
void __iomem *base;
void __iomem *port;
void __iomem *global;
};
struct netc_fdb_entry {
u32 entry_id;
struct fdbt_cfge_data cfge;
struct fdbt_keye_data keye;
struct hlist_node node;
};
struct netc_vlan_entry {
u16 vid;
u32 ect_gid;
u32 untagged_port_bitmap;
struct vft_cfge_data cfge;
struct hlist_node node;
};
struct netc_port_stat {
int reg;
char name[ETH_GSTRING_LEN] __nonstring;
};
struct netc_switch {
struct pci_dev *pdev;
struct device *dev;
struct dsa_switch *ds;
u16 revision;
const struct netc_switch_info *info;
struct netc_switch_regs regs;
struct netc_port **ports;
u32 port_bitmap; /* bitmap of available ports */
struct ntmp_user ntmp;
struct hlist_head fdb_list;
struct mutex fdbt_lock; /* FDB table lock */
struct delayed_work fdbt_ageing_work;
/* (fdbt_ageing_delay * NETC_FDBT_AGEING_THRESH) is ageing time */
unsigned long fdbt_ageing_delay;
atomic_t br_cnt;
struct hlist_head vlan_list;
struct mutex vft_lock; /* VLAN filter table lock */
/* Switch hardware capabilities */
u32 htmcapr_num_words;
u32 num_bp;
struct bpt_cfge_data *bpt_list;
};
#define NETC_PRIV(ds) ((struct netc_switch *)((ds)->priv))
#define NETC_PORT(ds, port_id) (NETC_PRIV(ds)->ports[(port_id)])
/* Write/Read Switch base registers */
Annotation
- Immediate include surface: `linux/dsa/tag_netc.h`, `linux/fsl/netc_global.h`, `linux/fsl/ntmp.h`, `linux/of_device.h`, `linux/of_net.h`, `linux/pci.h`, `netc_switch_hw.h`.
- Detected declarations: `struct netc_switch`, `struct netc_switch_info`, `struct netc_port_caps`, `struct netc_port`, `struct netc_switch_regs`, `struct netc_fdb_entry`, `struct netc_vlan_entry`, `struct netc_port_stat`, `struct netc_switch`, `enum netc_host_reason`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.