drivers/net/dsa/ocelot/felix.c
Source file repositories/reference/linux-study-clean/drivers/net/dsa/ocelot/felix.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/dsa/ocelot/felix.c- Extension
.c- Size
- 68111 bytes
- Lines
- 2465
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
uapi/linux/if_bridge.hsoc/mscc/ocelot_vcap.hsoc/mscc/ocelot_qsys.hsoc/mscc/ocelot_sys.hsoc/mscc/ocelot_dev.hsoc/mscc/ocelot_ana.hsoc/mscc/ocelot_ptp.hsoc/mscc/ocelot.hlinux/dsa/8021q.hlinux/dsa/ocelot.hlinux/platform_device.hlinux/ptp_classify.hlinux/module.hlinux/of_net.hlinux/pci.hlinux/of.hnet/pkt_sched.hnet/dsa.hfelix.h
Detected Declarations
function NPIfunction felix_cpu_port_for_conduitfunction portfunction felix_tag_8021q_vlan_add_rxfunction felix_tag_8021q_vlan_del_rxfunction felix_tag_8021q_vlan_add_txfunction felix_tag_8021q_vlan_del_txfunction felix_tag_8021q_vlan_addfunction dsa_switch_for_each_cpu_portfunction felix_tag_8021q_vlan_delfunction dsa_switch_for_each_cpu_portfunction felix_update_tag_8021q_rx_rulesfunction dsa_switch_for_each_cpu_portfunction felix_trap_get_cpu_portfunction felix_update_trapping_destinationsfunction felix_npi_port_initfunction felix_npi_port_deinitfunction felix_tag_npi_setupfunction dsa_switch_for_each_user_portfunction felix_tag_npi_teardownfunction felix_tag_npi_get_host_fwd_maskfunction felix_tag_npi_change_conduitfunction felix_tag_8021q_setupfunction felix_tag_8021q_teardownfunction felix_tag_8021q_get_host_fwd_maskfunction felix_tag_8021q_change_conduitfunction felix_set_host_floodfunction felix_migrate_host_floodfunction felix_migrate_mdbsfunction felix_tag_proto_setup_sharedfunction felix_change_tag_protocolfunction felix_get_tag_protocolfunction felix_port_set_host_floodfunction felix_port_change_conduitfunction felix_set_ageing_timefunction felix_port_fast_agefunction felix_fdb_dumpfunction felix_fdb_addfunction felix_fdb_delfunction felix_lag_fdb_addfunction felix_lag_fdb_delfunction felix_mdb_addfunction felix_mdb_delfunction felix_bridge_stp_state_setfunction felix_pre_bridge_flagsfunction felix_bridge_flagsfunction felix_bridge_joinfunction felix_bridge_leave
Annotated Snippet
if (using_tag_8021q) {
/* Redirect to the tag_8021q CPU port. If timestamps
* are necessary, also copy trapped packets to the CPU
* port module.
*/
mask_mode = OCELOT_MASK_MODE_REDIRECT;
port_mask = BIT(felix_trap_get_cpu_port(ds, trap));
cpu_copy_ena = !!trap->take_ts;
} else {
/* Trap packets only to the CPU port module, which is
* redirected to the NPI port (the DSA CPU port)
*/
mask_mode = OCELOT_MASK_MODE_PERMIT_DENY;
port_mask = 0;
cpu_copy_ena = true;
}
if (trap->action.mask_mode == mask_mode &&
trap->action.port_mask == port_mask &&
trap->action.cpu_copy_ena == cpu_copy_ena)
continue;
trap->action.mask_mode = mask_mode;
trap->action.port_mask = port_mask;
trap->action.cpu_copy_ena = cpu_copy_ena;
err = ocelot_vcap_filter_replace(ocelot, trap);
if (err)
return err;
}
return 0;
}
/* The CPU port module is connected to the Node Processor Interface (NPI). This
* is the mode through which frames can be injected from and extracted to an
* external CPU, over Ethernet. In NXP SoCs, the "external CPU" is the ARM CPU
* running Linux, and this forms a DSA setup together with the enetc or fman
* DSA conduit.
*/
static void felix_npi_port_init(struct ocelot *ocelot, int port)
{
ocelot->npi = port;
ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPUQ_MSK_M |
QSYS_EXT_CPU_CFG_EXT_CPU_PORT(port),
QSYS_EXT_CPU_CFG);
/* NPI port Injection/Extraction configuration */
ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_XTR_HDR,
ocelot->npi_xtr_prefix);
ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_INJ_HDR,
ocelot->npi_inj_prefix);
/* Disable transmission of pause frames */
ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 0);
}
static void felix_npi_port_deinit(struct ocelot *ocelot, int port)
{
/* Restore hardware defaults */
int unused_port = ocelot->num_phys_ports + 2;
ocelot->npi = -1;
ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPU_PORT(unused_port),
QSYS_EXT_CPU_CFG);
ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_XTR_HDR,
OCELOT_TAG_PREFIX_DISABLED);
ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_INJ_HDR,
OCELOT_TAG_PREFIX_DISABLED);
/* Enable transmission of pause frames */
ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 1);
}
static int felix_tag_npi_setup(struct dsa_switch *ds)
{
struct dsa_port *dp, *first_cpu_dp = NULL;
struct ocelot *ocelot = ds->priv;
dsa_switch_for_each_user_port(dp, ds) {
if (first_cpu_dp && dp->cpu_dp != first_cpu_dp) {
dev_err(ds->dev, "Multiple NPI ports not supported\n");
return -EINVAL;
}
first_cpu_dp = dp->cpu_dp;
}
Annotation
- Immediate include surface: `uapi/linux/if_bridge.h`, `soc/mscc/ocelot_vcap.h`, `soc/mscc/ocelot_qsys.h`, `soc/mscc/ocelot_sys.h`, `soc/mscc/ocelot_dev.h`, `soc/mscc/ocelot_ana.h`, `soc/mscc/ocelot_ptp.h`, `soc/mscc/ocelot.h`.
- Detected declarations: `function NPI`, `function felix_cpu_port_for_conduit`, `function port`, `function felix_tag_8021q_vlan_add_rx`, `function felix_tag_8021q_vlan_del_rx`, `function felix_tag_8021q_vlan_add_tx`, `function felix_tag_8021q_vlan_del_tx`, `function felix_tag_8021q_vlan_add`, `function dsa_switch_for_each_cpu_port`, `function felix_tag_8021q_vlan_del`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.