drivers/net/dsa/qca/qca8k.h

Source file repositories/reference/linux-study-clean/drivers/net/dsa/qca/qca8k.h

File Facts

System
Linux kernel
Corpus path
drivers/net/dsa/qca/qca8k.h
Extension
.h
Size
23728 bytes
Lines
597
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct qca8k_info_ops {
	int (*autocast_mib)(struct dsa_switch *ds, int port, u64 *data);
};

struct qca8k_match_data {
	u8 id;
	bool reduced_package;
	u8 mib_count;
	const struct qca8k_info_ops *ops;
};

enum {
	QCA8K_CPU_PORT0,
	QCA8K_CPU_PORT6,
};

struct qca8k_mgmt_eth_data {
	struct completion rw_done;
	struct mutex mutex; /* Enforce one mdio read/write at time */
	bool ack;
	u32 seq;
	u32 data[4];
};

struct qca8k_mib_eth_data {
	struct completion rw_done;
	struct mutex mutex; /* Process one command at time */
	refcount_t port_parsed; /* Counter to track parsed port */
	u8 req_port;
	u64 *data; /* pointer to ethtool data */
};

struct qca8k_ports_config {
	bool sgmii_rx_clk_falling_edge;
	bool sgmii_tx_clk_falling_edge;
	bool sgmii_enable_pll;
	u8 rgmii_rx_delay[QCA8K_NUM_CPU_PORTS]; /* 0: CPU port0, 1: CPU port6 */
	u8 rgmii_tx_delay[QCA8K_NUM_CPU_PORTS]; /* 0: CPU port0, 1: CPU port6 */
};

struct qca8k_mdio_cache {
/* The 32bit switch registers are accessed indirectly. To achieve this we need
 * to set the page of the register. Track the last page that was set to reduce
 * mdio writes
 */
	u16 page;
};

struct qca8k_pcs {
	struct phylink_pcs pcs;
	struct qca8k_priv *priv;
	int port;
};

struct qca8k_led_pattern_en {
	u32 reg;
	u8 shift;
};

struct qca8k_led {
	u8 port_num;
	u8 led_num;
	u16 old_rule;
	struct qca8k_priv *priv;
	struct led_classdev cdev;
};

struct qca8k_priv {
	u8 switch_id;
	u8 switch_revision;
	u8 mirror_rx;
	u8 mirror_tx;
	u8 lag_hash_mode;
	/* Each bit correspond to a port. This switch can support a max of 7 port.
	 * Bit 1: port enabled. Bit 0: port disabled.
	 */
	u8 port_enabled_map;
	u8 port_isolated_map;
	struct qca8k_ports_config ports_config;
	struct regmap *regmap;
	struct mii_bus *bus;
	struct mii_bus *internal_mdio_bus;
	struct dsa_switch *ds;
	struct mutex reg_mutex;
	struct device *dev;
	struct gpio_desc *reset_gpio;
	struct net_device *mgmt_conduit; /* Track if mdio/mib Ethernet is available */
	struct qca8k_mgmt_eth_data mgmt_eth_data;
	struct qca8k_mib_eth_data mib_eth_data;
	struct qca8k_mdio_cache mdio_cache;

Annotation

Implementation Notes