drivers/net/dsa/xrs700x/xrs700x_reg.h

Source file repositories/reference/linux-study-clean/drivers/net/dsa/xrs700x/xrs700x_reg.h

File Facts

System: Linux kernel
Corpus path: drivers/net/dsa/xrs700x/xrs700x_reg.h
Extension: .h
Size: 9616 bytes
Lines: 209
Domain: Driver Families
Bucket: drivers/net
Inferred role: Driver Families: implementation source
Status: source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

No C-style include directives detected by the generator.

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#define XRS_DEVICE_ID_BASE		0x0
#define XRS_GPIO_BASE			0x10000
#define XRS_PORT_OFFSET			0x10000
#define XRS_PORT_BASE(x)		(0x200000 + XRS_PORT_OFFSET * (x))
#define XRS_RTC_BASE			0x280000
#define XRS_TS_OFFSET			0x8000
#define XRS_TS_BASE(x)			(0x290000 + XRS_TS_OFFSET * (x))
#define XRS_SWITCH_CONF_BASE		0x300000

/* Device Identification Registers */
#define XRS_DEV_ID0			(XRS_DEVICE_ID_BASE + 0)
#define XRS_DEV_ID1			(XRS_DEVICE_ID_BASE + 2)
#define XRS_INT_ID0			(XRS_DEVICE_ID_BASE + 4)
#define XRS_INT_ID1			(XRS_DEVICE_ID_BASE + 6)
#define XRS_REV_ID			(XRS_DEVICE_ID_BASE + 8)

/* GPIO Registers */
#define XRS_CONFIG0			(XRS_GPIO_BASE + 0x1000)
#define XRS_INPUT_STATUS0		(XRS_GPIO_BASE + 0x1002)
#define XRS_CONFIG1			(XRS_GPIO_BASE + 0x1004)
#define XRS_INPUT_STATUS1		(XRS_GPIO_BASE + 0x1006)
#define XRS_CONFIG2			(XRS_GPIO_BASE + 0x1008)
#define XRS_INPUT_STATUS2		(XRS_GPIO_BASE + 0x100a)

/* Port Configuration Registers */
#define XRS_PORT_GEN_BASE(x)		(XRS_PORT_BASE(x) + 0x0)
#define XRS_PORT_HSR_BASE(x)		(XRS_PORT_BASE(x) + 0x2000)
#define XRS_PORT_PTP_BASE(x)		(XRS_PORT_BASE(x) + 0x4000)
#define XRS_PORT_CNT_BASE(x)		(XRS_PORT_BASE(x) + 0x6000)
#define XRS_PORT_IPO_BASE(x)		(XRS_PORT_BASE(x) + 0x8000)

/* Port Configuration Registers - General and State */
#define XRS_PORT_STATE(x)		(XRS_PORT_GEN_BASE(x) + 0x0)
#define XRS_PORT_FORWARDING		0
#define XRS_PORT_LEARNING		1
#define XRS_PORT_DISABLED		2
#define XRS_PORT_MODE_NORMAL		0
#define XRS_PORT_MODE_MANAGEMENT	1
#define XRS_PORT_SPEED_1000		0x12
#define XRS_PORT_SPEED_100		0x20
#define XRS_PORT_SPEED_10		0x30
#define XRS_PORT_VLAN(x)		(XRS_PORT_GEN_BASE(x) + 0x10)
#define XRS_PORT_VLAN0_MAPPING(x)	(XRS_PORT_GEN_BASE(x) + 0x12)
#define XRS_PORT_FWD_MASK(x)		(XRS_PORT_GEN_BASE(x) + 0x14)
#define XRS_PORT_VLAN_PRIO(x)		(XRS_PORT_GEN_BASE(x) + 0x16)

/* Port Configuration Registers - HSR/PRP */
#define XRS_HSR_CFG(x)			(XRS_PORT_HSR_BASE(x) + 0x0)
#define XRS_HSR_CFG_HSR_PRP		BIT(0)
#define XRS_HSR_CFG_HSR			0
#define XRS_HSR_CFG_PRP			BIT(8)
#define XRS_HSR_CFG_LANID_A		0
#define XRS_HSR_CFG_LANID_B		BIT(10)

/* Port Configuration Registers - PTP */
#define XRS_PTP_RX_SYNC_DELAY_NS_LO(x)	(XRS_PORT_PTP_BASE(x) + 0x2)
#define XRS_PTP_RX_SYNC_DELAY_NS_HI(x)	(XRS_PORT_PTP_BASE(x) + 0x4)
#define XRS_PTP_RX_EVENT_DELAY_NS(x)	(XRS_PORT_PTP_BASE(x) + 0xa)
#define XRS_PTP_TX_EVENT_DELAY_NS(x)	(XRS_PORT_PTP_BASE(x) + 0x12)

/* Port Configuration Registers - Counter */
#define XRS_CNT_CTRL(x)			(XRS_PORT_CNT_BASE(x) + 0x0)
#define XRS_RX_GOOD_OCTETS_L		(XRS_PORT_CNT_BASE(0) + 0x200)
#define XRS_RX_GOOD_OCTETS_H		(XRS_PORT_CNT_BASE(0) + 0x202)
#define XRS_RX_BAD_OCTETS_L		(XRS_PORT_CNT_BASE(0) + 0x204)
#define XRS_RX_BAD_OCTETS_H		(XRS_PORT_CNT_BASE(0) + 0x206)
#define XRS_RX_UNICAST_L		(XRS_PORT_CNT_BASE(0) + 0x208)
#define XRS_RX_UNICAST_H		(XRS_PORT_CNT_BASE(0) + 0x20a)
#define XRS_RX_BROADCAST_L		(XRS_PORT_CNT_BASE(0) + 0x20c)
#define XRS_RX_BROADCAST_H		(XRS_PORT_CNT_BASE(0) + 0x20e)
#define XRS_RX_MULTICAST_L		(XRS_PORT_CNT_BASE(0) + 0x210)
#define XRS_RX_MULTICAST_H		(XRS_PORT_CNT_BASE(0) + 0x212)
#define XRS_RX_UNDERSIZE_L		(XRS_PORT_CNT_BASE(0) + 0x214)
#define XRS_RX_UNDERSIZE_H		(XRS_PORT_CNT_BASE(0) + 0x216)
#define XRS_RX_FRAGMENTS_L		(XRS_PORT_CNT_BASE(0) + 0x218)
#define XRS_RX_FRAGMENTS_H		(XRS_PORT_CNT_BASE(0) + 0x21a)
#define XRS_RX_OVERSIZE_L		(XRS_PORT_CNT_BASE(0) + 0x21c)
#define XRS_RX_OVERSIZE_H		(XRS_PORT_CNT_BASE(0) + 0x21e)
#define XRS_RX_JABBER_L			(XRS_PORT_CNT_BASE(0) + 0x220)
#define XRS_RX_JABBER_H			(XRS_PORT_CNT_BASE(0) + 0x222)
#define XRS_RX_ERR_L			(XRS_PORT_CNT_BASE(0) + 0x224)
#define XRS_RX_ERR_H			(XRS_PORT_CNT_BASE(0) + 0x226)
#define XRS_RX_CRC_L			(XRS_PORT_CNT_BASE(0) + 0x228)
#define XRS_RX_CRC_H			(XRS_PORT_CNT_BASE(0) + 0x22a)
#define XRS_RX_64_L			(XRS_PORT_CNT_BASE(0) + 0x22c)
#define XRS_RX_64_H			(XRS_PORT_CNT_BASE(0) + 0x22e)
#define XRS_RX_65_127_L			(XRS_PORT_CNT_BASE(0) + 0x230)
#define XRS_RX_65_127_H			(XRS_PORT_CNT_BASE(0) + 0x232)
#define XRS_RX_128_255_L		(XRS_PORT_CNT_BASE(0) + 0x234)
#define XRS_RX_128_255_H		(XRS_PORT_CNT_BASE(0) + 0x236)

Annotation

Atlas domain: Driver Families / drivers/net.
Implementation status: source implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.