drivers/net/ethernet/amazon/ena/ena_com.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/amazon/ena/ena_com.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/amazon/ena/ena_com.c- Extension
.c- Size
- 95037 bytes
- Lines
- 3240
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
ena_com.h
Detected Declarations
struct ena_comp_ctxstruct ena_com_stats_ctxenum ena_cmd_statusfunction ena_com_mem_addr_setfunction ena_com_admin_init_sqfunction ena_com_admin_init_cqfunction ena_com_admin_init_aenqfunction comp_ctxt_releasefunction ena_com_init_comp_ctxtfunction ena_com_init_io_sqfunction ena_com_init_io_cqfunction ena_com_handle_single_admin_completionfunction ena_com_handle_admin_completionfunction ena_com_comp_status_to_errnofunction ena_delay_exponential_backoff_usfunction ena_com_wait_and_process_admin_cq_pollingfunction ena_com_set_llqfunction ena_com_config_llq_infofunction ena_com_wait_and_process_admin_cq_interruptsfunction ena_com_reg_bar_read32function ena_com_wait_and_process_admin_cqfunction ena_com_destroy_io_sqfunction ena_com_io_queue_freefunction wait_for_reset_statefunction ena_com_check_supported_feature_idfunction ena_com_get_feature_exfunction ena_com_get_featurefunction ena_com_get_current_hash_functionfunction ena_com_hash_key_fill_default_keyfunction ena_com_hash_key_allocatefunction ena_com_hash_key_destroyfunction ena_com_hash_ctrl_initfunction ena_com_hash_ctrl_destroyfunction ena_com_indirect_table_allocatefunction ena_com_indirect_table_destroyfunction ena_com_create_io_sqfunction ena_com_ind_tbl_convert_to_devicefunction ena_com_update_intr_delay_resolutionfunction ena_com_execute_admin_commandfunction ena_com_create_io_cqfunction ena_com_get_io_handlersfunction ena_com_abort_admin_commandsfunction ena_com_wait_for_abort_completionfunction ena_com_destroy_io_cqfunction ena_com_get_admin_running_statefunction ena_com_set_admin_running_statefunction ena_com_admin_aenq_enablefunction ena_com_set_aenq_config
Annotated Snippet
struct ena_comp_ctx {
struct completion wait_event;
struct ena_admin_acq_entry *user_cqe;
u32 comp_size;
enum ena_cmd_status status;
/* status from the device */
u8 comp_status;
u8 cmd_opcode;
bool occupied;
};
struct ena_com_stats_ctx {
struct ena_admin_aq_get_stats_cmd get_cmd;
struct ena_admin_acq_get_stats_resp get_resp;
};
static int ena_com_mem_addr_set(struct ena_com_dev *ena_dev,
struct ena_common_mem_addr *ena_addr,
dma_addr_t addr)
{
if ((addr & GENMASK_ULL(ena_dev->dma_addr_bits - 1, 0)) != addr) {
netdev_err(ena_dev->net_device,
"DMA address has more bits that the device supports\n");
return -EINVAL;
}
ena_addr->mem_addr_low = lower_32_bits(addr);
ena_addr->mem_addr_high = (u16)upper_32_bits(addr);
return 0;
}
static int ena_com_admin_init_sq(struct ena_com_admin_queue *admin_queue)
{
struct ena_com_dev *ena_dev = admin_queue->ena_dev;
struct ena_com_admin_sq *sq = &admin_queue->sq;
u16 size = ADMIN_SQ_SIZE(admin_queue->q_depth);
sq->entries = dma_alloc_coherent(admin_queue->q_dmadev, size, &sq->dma_addr, GFP_KERNEL);
if (!sq->entries) {
netdev_err(ena_dev->net_device, "Memory allocation failed\n");
return -ENOMEM;
}
sq->head = 0;
sq->tail = 0;
sq->phase = 1;
sq->db_addr = NULL;
return 0;
}
static int ena_com_admin_init_cq(struct ena_com_admin_queue *admin_queue)
{
struct ena_com_dev *ena_dev = admin_queue->ena_dev;
struct ena_com_admin_cq *cq = &admin_queue->cq;
u16 size = ADMIN_CQ_SIZE(admin_queue->q_depth);
cq->entries = dma_alloc_coherent(admin_queue->q_dmadev, size, &cq->dma_addr, GFP_KERNEL);
if (!cq->entries) {
netdev_err(ena_dev->net_device, "Memory allocation failed\n");
return -ENOMEM;
}
cq->head = 0;
cq->phase = 1;
return 0;
}
static int ena_com_admin_init_aenq(struct ena_com_dev *ena_dev,
struct ena_aenq_handlers *aenq_handlers)
{
struct ena_com_aenq *aenq = &ena_dev->aenq;
u32 addr_low, addr_high, aenq_caps;
u16 size;
ena_dev->aenq.q_depth = ENA_ASYNC_QUEUE_DEPTH;
size = ADMIN_AENQ_SIZE(ENA_ASYNC_QUEUE_DEPTH);
aenq->entries = dma_alloc_coherent(ena_dev->dmadev, size, &aenq->dma_addr, GFP_KERNEL);
if (!aenq->entries) {
netdev_err(ena_dev->net_device, "Memory allocation failed\n");
return -ENOMEM;
}
aenq->head = aenq->q_depth;
Annotation
- Immediate include surface: `ena_com.h`.
- Detected declarations: `struct ena_comp_ctx`, `struct ena_com_stats_ctx`, `enum ena_cmd_status`, `function ena_com_mem_addr_set`, `function ena_com_admin_init_sq`, `function ena_com_admin_init_cq`, `function ena_com_admin_init_aenq`, `function comp_ctxt_release`, `function ena_com_init_comp_ctxt`, `function ena_com_init_io_sq`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.