drivers/net/ethernet/amd/amd8111e.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/amd/amd8111e.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/amd/amd8111e.c- Extension
.c- Size
- 50750 bytes
- Lines
- 1920
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/module.hlinux/kernel.hlinux/types.hlinux/compiler.hlinux/delay.hlinux/interrupt.hlinux/ioport.hlinux/pci.hlinux/netdevice.hlinux/etherdevice.hlinux/skbuff.hlinux/ethtool.hlinux/mii.hlinux/if_vlan.hlinux/ctype.hlinux/crc32.hlinux/dma-mapping.hasm/io.hasm/byteorder.hlinux/uaccess.hamd8111e.h
Detected Declarations
function amd8111e_read_phyfunction amd8111e_write_phyfunction amd8111e_mdio_readfunction amd8111e_mdio_writefunction amd8111e_set_ext_phyfunction amd8111e_free_skbsfunction amd8111e_set_rx_buff_lenfunction amd8111e_init_ringfunction amd8111e_set_coalescefunction amd8111e_restartfunction amd8111e_init_hw_defaultfunction amd8111e_disable_interruptfunction amd8111e_stop_chipfunction amd8111e_free_ringfunction amd8111e_txfunction amd8111e_rx_pollfunction amd8111e_link_changefunction amd8111e_read_mibfunction amd8111e_calc_coalescefunction amd8111e_interruptfunction amd8111e_pollfunction amd8111e_closefunction amd8111e_openfunction amd8111e_tx_queue_availfunction amd8111e_start_xmitfunction amd8111e_read_regsfunction amd8111e_set_multicast_listfunction netdev_mc_countfunction amd8111e_get_drvinfofunction amd8111e_get_regs_lenfunction amd8111e_get_regsfunction amd8111e_get_link_ksettingsfunction amd8111e_set_link_ksettingsfunction amd8111e_nway_resetfunction amd8111e_get_linkfunction amd8111e_get_wolfunction amd8111e_set_wolfunction amd8111e_ioctlfunction amd8111e_set_mac_addressfunction amd8111e_change_mtufunction amd8111e_enable_magicpktfunction amd8111e_enable_link_changefunction amd8111e_tx_timeoutfunction amd8111e_suspendfunction amd8111e_resumefunction amd8111e_config_ipgfunction amd8111e_probe_ext_phyfunction amd8111e_probe_one
Annotated Snippet
static const struct net_device_ops amd8111e_netdev_ops = {
.ndo_open = amd8111e_open,
.ndo_stop = amd8111e_close,
.ndo_start_xmit = amd8111e_start_xmit,
.ndo_tx_timeout = amd8111e_tx_timeout,
.ndo_get_stats = amd8111e_get_stats,
.ndo_set_rx_mode = amd8111e_set_multicast_list,
.ndo_validate_addr = eth_validate_addr,
.ndo_set_mac_address = amd8111e_set_mac_address,
.ndo_eth_ioctl = amd8111e_ioctl,
.ndo_change_mtu = amd8111e_change_mtu,
#ifdef CONFIG_NET_POLL_CONTROLLER
.ndo_poll_controller = amd8111e_poll,
#endif
};
static int amd8111e_probe_one(struct pci_dev *pdev,
const struct pci_device_id *ent)
{
int err, i;
unsigned long reg_addr, reg_len;
struct amd8111e_priv *lp;
struct net_device *dev;
u8 addr[ETH_ALEN];
err = pci_enable_device(pdev);
if (err) {
dev_err(&pdev->dev, "Cannot enable new PCI device\n");
return err;
}
if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
dev_err(&pdev->dev, "Cannot find PCI base address\n");
err = -ENODEV;
goto err_disable_pdev;
}
err = pci_request_regions(pdev, MODULE_NAME);
if (err) {
dev_err(&pdev->dev, "Cannot obtain PCI resources\n");
goto err_disable_pdev;
}
pci_set_master(pdev);
/* Find power-management capability. */
if (!pdev->pm_cap) {
dev_err(&pdev->dev, "No Power Management capability\n");
err = -ENODEV;
goto err_free_reg;
}
/* Initialize DMA */
if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)) < 0) {
dev_err(&pdev->dev, "DMA not supported\n");
err = -ENODEV;
goto err_free_reg;
}
reg_addr = pci_resource_start(pdev, 0);
reg_len = pci_resource_len(pdev, 0);
dev = alloc_etherdev(sizeof(struct amd8111e_priv));
if (!dev) {
err = -ENOMEM;
goto err_free_reg;
}
SET_NETDEV_DEV(dev, &pdev->dev);
#if AMD8111E_VLAN_TAG_USED
dev->features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;
#endif
lp = netdev_priv(dev);
lp->pci_dev = pdev;
lp->amd8111e_net_dev = dev;
spin_lock_init(&lp->lock);
lp->mmio = devm_ioremap(&pdev->dev, reg_addr, reg_len);
if (!lp->mmio) {
dev_err(&pdev->dev, "Cannot map device registers\n");
err = -ENOMEM;
goto err_free_dev;
}
/* Initializing MAC address */
for (i = 0; i < ETH_ALEN; i++)
addr[i] = readb(lp->mmio + PADR + i);
Annotation
- Immediate include surface: `linux/module.h`, `linux/kernel.h`, `linux/types.h`, `linux/compiler.h`, `linux/delay.h`, `linux/interrupt.h`, `linux/ioport.h`, `linux/pci.h`.
- Detected declarations: `function amd8111e_read_phy`, `function amd8111e_write_phy`, `function amd8111e_mdio_read`, `function amd8111e_mdio_write`, `function amd8111e_set_ext_phy`, `function amd8111e_free_skbs`, `function amd8111e_set_rx_buff_len`, `function amd8111e_init_ring`, `function amd8111e_set_coalesce`, `function amd8111e_restart`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: pattern implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.