drivers/net/ethernet/amd/pcnet32.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/amd/pcnet32.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/amd/pcnet32.c- Extension
.c- Size
- 86747 bytes
- Lines
- 3047
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/module.hlinux/kernel.hlinux/sched.hlinux/string.hlinux/errno.hlinux/ioport.hlinux/slab.hlinux/interrupt.hlinux/pci.hlinux/delay.hlinux/init.hlinux/ethtool.hlinux/mii.hlinux/crc32.hlinux/netdevice.hlinux/etherdevice.hlinux/if_ether.hlinux/skbuff.hlinux/spinlock.hlinux/moduleparam.hlinux/bitops.hlinux/io.hlinux/uaccess.hasm/dma.hasm/irq.h
Detected Declarations
struct pcnet32_rx_headstruct pcnet32_tx_headstruct pcnet32_init_blockstruct pcnet32_accessstruct pcnet32_privatefunction pcnet32_wio_read_csrfunction pcnet32_wio_write_csrfunction pcnet32_wio_read_bcrfunction pcnet32_wio_write_bcrfunction pcnet32_wio_read_rapfunction pcnet32_wio_write_rapfunction pcnet32_wio_resetfunction pcnet32_wio_checkfunction pcnet32_dwio_read_csrfunction pcnet32_dwio_write_csrfunction pcnet32_dwio_read_bcrfunction pcnet32_dwio_write_bcrfunction pcnet32_dwio_read_rapfunction pcnet32_dwio_write_rapfunction pcnet32_dwio_resetfunction pcnet32_dwio_checkfunction pcnet32_netif_stopfunction pcnet32_netif_startfunction pcnet32_realloc_tx_ringfunction pcnet32_realloc_rx_ringfunction pcnet32_purge_rx_ringfunction pcnet32_poll_controllerfunction pcnet32_suspendfunction pcnet32_clr_suspendfunction pcnet32_get_link_ksettingsfunction pcnet32_set_link_ksettingsfunction pcnet32_get_drvinfofunction pcnet32_get_linkfunction pcnet32_get_msglevelfunction pcnet32_set_msglevelfunction pcnet32_nway_resetfunction pcnet32_get_ringparamfunction pcnet32_set_ringparamfunction pcnet32_get_stringsfunction pcnet32_get_sset_countfunction pcnet32_ethtool_testfunction pcnet32_loopback_testfunction pcnet32_set_phys_idfunction pcnet32_rx_entryfunction pcnet32_rxfunction pcnet32_txfunction pcnet32_pollfunction pcnet32_get_regs_len
Annotated Snippet
static const struct net_device_ops pcnet32_netdev_ops = {
.ndo_open = pcnet32_open,
.ndo_stop = pcnet32_close,
.ndo_start_xmit = pcnet32_start_xmit,
.ndo_tx_timeout = pcnet32_tx_timeout,
.ndo_get_stats = pcnet32_get_stats,
.ndo_set_rx_mode = pcnet32_set_multicast_list,
.ndo_eth_ioctl = pcnet32_ioctl,
.ndo_set_mac_address = eth_mac_addr,
.ndo_validate_addr = eth_validate_addr,
#ifdef CONFIG_NET_POLL_CONTROLLER
.ndo_poll_controller = pcnet32_poll_controller,
#endif
};
/* pcnet32_probe1
* Called from both pcnet32_probe_vlbus and pcnet_probe_pci.
* pdev will be NULL when called from pcnet32_probe_vlbus.
*/
static int
pcnet32_probe1(unsigned long ioaddr, int shared, struct pci_dev *pdev)
{
struct pcnet32_private *lp;
int i, media;
int fdx, mii, fset, dxsuflo, sram;
int chip_version;
char *chipname;
struct net_device *dev;
const struct pcnet32_access *a = NULL;
u8 promaddr[ETH_ALEN];
u8 addr[ETH_ALEN];
int ret = -ENODEV;
/* reset the chip */
pcnet32_wio_reset(ioaddr);
/* NOTE: 16-bit check is first, otherwise some older PCnet chips fail */
if (pcnet32_wio_read_csr(ioaddr, 0) == 4 && pcnet32_wio_check(ioaddr)) {
a = &pcnet32_wio;
} else {
pcnet32_dwio_reset(ioaddr);
if (pcnet32_dwio_read_csr(ioaddr, 0) == 4 &&
pcnet32_dwio_check(ioaddr)) {
a = &pcnet32_dwio;
} else {
if (pcnet32_debug & NETIF_MSG_PROBE)
pr_err("No access methods\n");
goto err_release_region;
}
}
chip_version =
a->read_csr(ioaddr, 88) | (a->read_csr(ioaddr, 89) << 16);
if ((pcnet32_debug & NETIF_MSG_PROBE) && (pcnet32_debug & NETIF_MSG_HW))
pr_info(" PCnet chip version is %#x\n", chip_version);
if ((chip_version & 0xfff) != 0x003) {
if (pcnet32_debug & NETIF_MSG_PROBE)
pr_info("Unsupported chip version\n");
goto err_release_region;
}
/* initialize variables */
fdx = mii = fset = dxsuflo = sram = 0;
chip_version = (chip_version >> 12) & 0xffff;
switch (chip_version) {
case 0x2420:
chipname = "PCnet/PCI 79C970"; /* PCI */
break;
case 0x2430:
if (shared)
chipname = "PCnet/PCI 79C970"; /* 970 gives the wrong chip id back */
else
chipname = "PCnet/32 79C965"; /* 486/VL bus */
break;
case 0x2621:
chipname = "PCnet/PCI II 79C970A"; /* PCI */
fdx = 1;
break;
case 0x2623:
chipname = "PCnet/FAST 79C971"; /* PCI */
fdx = 1;
mii = 1;
fset = 1;
break;
case 0x2624:
chipname = "PCnet/FAST+ 79C972"; /* PCI */
fdx = 1;
mii = 1;
fset = 1;
Annotation
- Immediate include surface: `linux/module.h`, `linux/kernel.h`, `linux/sched.h`, `linux/string.h`, `linux/errno.h`, `linux/ioport.h`, `linux/slab.h`, `linux/interrupt.h`.
- Detected declarations: `struct pcnet32_rx_head`, `struct pcnet32_tx_head`, `struct pcnet32_init_block`, `struct pcnet32_access`, `struct pcnet32_private`, `function pcnet32_wio_read_csr`, `function pcnet32_wio_write_csr`, `function pcnet32_wio_read_bcr`, `function pcnet32_wio_write_bcr`, `function pcnet32_wio_read_rap`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: pattern implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.