drivers/net/ethernet/apm/xgene/xgene_enet_hw.c

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/apm/xgene/xgene_enet_hw.c

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/apm/xgene/xgene_enet_hw.c
Extension
.c
Size
25836 bytes
Lines
1024
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

phy_interface_mode_is_rgmii(pdata->phy_mode)) {
		struct mii_bus *bus = ndev->phydev->mdio.bus;

		return xgene_mdio_wr_mac(bus->priv, wr_addr, wr_data);
	}

	addr = pdata->mcx_mac_addr + MAC_ADDR_REG_OFFSET;
	wr = pdata->mcx_mac_addr + MAC_WRITE_REG_OFFSET;
	cmd = pdata->mcx_mac_addr + MAC_COMMAND_REG_OFFSET;
	cmd_done = pdata->mcx_mac_addr + MAC_COMMAND_DONE_REG_OFFSET;

	spin_lock(&pdata->mac_lock);
	iowrite32(wr_addr, addr);
	iowrite32(wr_data, wr);
	iowrite32(XGENE_ENET_WR_CMD, cmd);

	while (!(done = ioread32(cmd_done)) && wait--)
		udelay(1);

	if (!done)
		netdev_err(ndev, "mac write failed, addr: %04x data: %08x\n",
			   wr_addr, wr_data);

	iowrite32(0, cmd);
	spin_unlock(&pdata->mac_lock);
}

static void xgene_enet_rd_csr(struct xgene_enet_pdata *pdata,
			      u32 offset, u32 *val)
{
	void __iomem *addr = pdata->eth_csr_addr + offset;

	*val = ioread32(addr);
}

static void xgene_enet_rd_diag_csr(struct xgene_enet_pdata *pdata,
				   u32 offset, u32 *val)
{
	void __iomem *addr = pdata->eth_diag_csr_addr + offset;

	*val = ioread32(addr);
}

static void xgene_enet_rd_mcx_csr(struct xgene_enet_pdata *pdata,
				  u32 offset, u32 *val)
{
	void __iomem *addr = pdata->mcx_mac_csr_addr + offset;

	*val = ioread32(addr);
}

u32 xgene_enet_rd_mac(struct xgene_enet_pdata *pdata, u32 rd_addr)
{
	void __iomem *addr, *rd, *cmd, *cmd_done;
	struct net_device *ndev = pdata->ndev;
	u32 done, rd_data;
	u8 wait = 10;

	if (pdata->mdio_driver && ndev->phydev &&
	    phy_interface_mode_is_rgmii(pdata->phy_mode)) {
		struct mii_bus *bus = ndev->phydev->mdio.bus;

		return xgene_mdio_rd_mac(bus->priv, rd_addr);
	}

	addr = pdata->mcx_mac_addr + MAC_ADDR_REG_OFFSET;
	rd = pdata->mcx_mac_addr + MAC_READ_REG_OFFSET;
	cmd = pdata->mcx_mac_addr + MAC_COMMAND_REG_OFFSET;
	cmd_done = pdata->mcx_mac_addr + MAC_COMMAND_DONE_REG_OFFSET;

	spin_lock(&pdata->mac_lock);
	iowrite32(rd_addr, addr);
	iowrite32(XGENE_ENET_RD_CMD, cmd);

	while (!(done = ioread32(cmd_done)) && wait--)
		udelay(1);

	if (!done)
		netdev_err(ndev, "mac read failed, addr: %04x\n", rd_addr);

	rd_data = ioread32(rd);
	iowrite32(0, cmd);
	spin_unlock(&pdata->mac_lock);

	return rd_data;
}

u32 xgene_enet_rd_stat(struct xgene_enet_pdata *pdata, u32 rd_addr)
{
	void __iomem *addr, *rd, *cmd, *cmd_done;

Annotation

Implementation Notes