drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.c

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.c

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.c
Extension
.c
Size
46460 bytes
Lines
1665
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (tags[i].usage > 0 && tags[i].action == action) {
			tags[i].usage++;
			return i;
		}

	for (i = 1; i <= top; i++)
		if (tags[i].usage == 0) {
			tags[i].usage = 1;
			tags[i].action = action;
			return i;
		}

	return -ENOSPC;
}

static void hw_atl2_filter_tag_put(struct hw_atl2_tag_policy *tags,
				   int tag)
{
	if (tags[tag].usage > 0)
		tags[tag].usage--;
}

static u32 hw_atl2_sem_act_rslvr_get(struct aq_hw_s *self)
{
	return hw_atl_reg_glb_cpu_sem_get(self, HW_ATL2_FW_SM_ACT_RSLVR);
}

static int hw_atl2_hw_reset(struct aq_hw_s *self)
{
	struct hw_atl2_priv *priv = self->priv;
	s8 clk_sel;
	int err;
	int i;

	err = hw_atl2_utils_soft_reset(self);
	if (err)
		return err;

	memset(&priv->last_stats, 0, sizeof(priv->last_stats));
	memset(priv->l3_v4_filters, 0, sizeof(priv->l3_v4_filters));
	memset(priv->l3_v6_filters, 0, sizeof(priv->l3_v6_filters));
	memset(priv->l4_filters, 0, sizeof(priv->l4_filters));
	memset(priv->etype_policy, 0, sizeof(priv->etype_policy));
	for (i = 0; i < HW_ATL2_RPF_L3L4_FILTERS; i++) {
		priv->l3l4_filters[i].l3_index = -1;
		priv->l3l4_filters[i].l4_index = -1;
	}

	clk_sel = READ_ONCE(self->clk_select);
	if (clk_sel != -1)
		hw_atl2_enable_ptp(self,
				   clk_sel,
				   aq_utils_obj_test(&self->flags, AQ_HW_PTP_AVAILABLE) ?
				   1 : 0);

	self->aq_fw_ops->set_state(self, MPI_RESET);

	err = aq_hw_err_from_flags(self);

	return err;
}

static int hw_atl2_tc_ptp_set(struct aq_hw_s *self)
{
	/* Init TC2 for PTP_TX */
	hw_atl_tpb_tx_pkt_buff_size_per_tc_set(self, HW_ATL2_PTP_TXBUF_SIZE,
					       AQ_HW_PTP_TC);

	/* Init TC2 for PTP_RX */
	hw_atl_rpb_rx_pkt_buff_size_per_tc_set(self, HW_ATL2_PTP_RXBUF_SIZE,
					       AQ_HW_PTP_TC);

	/* No flow control for PTP */
	hw_atl_rpb_rx_xoff_en_per_tc_set(self, 0U, AQ_HW_PTP_TC);

	hw_atl2_tpb_tps_highest_priority_tc_set(self, AQ_HW_PTP_TC);

	return aq_hw_err_from_flags(self);
}

static int hw_atl2_hw_queue_to_tc_map_set(struct aq_hw_s *self)
{
	struct aq_nic_cfg_s *cfg = self->aq_nic_cfg;
	unsigned int tcs, q_per_tc;
	unsigned int tc, q;
	u32 rx_map = 0;
	u32 tx_map = 0;

	hw_atl2_tpb_tx_tc_q_rand_map_en_set(self, 1U);

Annotation

Implementation Notes