drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_utils.h
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_utils.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_utils.h- Extension
.h- Size
- 10967 bytes
- Lines
- 650
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
aq_hw.h
Detected Declarations
struct hw_atl2_txts_sstruct link_options_sstruct link_control_sstruct thermal_shutdown_sstruct mac_address_sstruct mac_address_aligned_sstruct sleep_proxy_sstruct wake_on_lan_sstruct __packedstruct __packedstruct pause_quanta_sstruct data_buffer_status_sstruct device_caps_sstruct version_sstruct bundle_version_tstruct mac_version_tstruct phy_version_tstruct link_status_sstruct wol_status_sstruct mac_health_monitor_sstruct phy_health_monitor_sstruct device_link_caps_sstruct sleep_proxy_caps_sstruct lkp_link_caps_sstruct core_dump_sstruct trace_sstruct cable_diag_control_sstruct cable_diag_lane_data_sstruct cable_diag_status_sstruct statistics_a0_sstruct filter_caps_sstruct request_policy_sstruct fw_interface_instruct transaction_counter_sstruct management_status_s
Annotated Snippet
struct hw_atl2_txts_s {
__le64 ts;
__le32 ctrl;
u32 reserved;
};
#define HW_ATL2_TXTS_DD BIT(3)
#define HW_ATL2_TXTS_TS_VALID BIT(20)
/* F W A P I */
struct link_options_s {
u8 link_up:1;
u8 link_renegotiate:1;
u8 minimal_link_speed:1;
u8 internal_loopback:1;
u8 external_loopback:1;
u8 rate_10M_hd:1;
u8 rate_100M_hd:1;
u8 rate_1G_hd:1;
u8 rate_10M:1;
u8 rate_100M:1;
u8 rate_1G:1;
u8 rate_2P5G:1;
u8 rate_N2P5G:1;
u8 rate_5G:1;
u8 rate_N5G:1;
u8 rate_10G:1;
u8 eee_100M:1;
u8 eee_1G:1;
u8 eee_2P5G:1;
u8 eee_5G:1;
u8 eee_10G:1;
u8 rsvd3:3;
u8 pause_rx:1;
u8 pause_tx:1;
u8 rsvd4:1;
u8 downshift:1;
u8 downshift_retry:4;
};
struct link_control_s {
u8 mode:4;
u8 disable_crc_corruption:1;
u8 discard_short_frames:1;
u8 flow_control_mode:1;
u8 disable_length_check:1;
u8 discard_errored_frames:1;
u8 control_frame_enable:1;
u8 enable_tx_padding:1;
u8 enable_crc_forwarding:1;
u8 enable_frame_padding_removal_rx: 1;
u8 promiscuous_mode: 1;
u8 rsvd:2;
u16 rsvd2;
};
struct thermal_shutdown_s {
u8 enable:1;
u8 warning_enable:1;
u8 rsvd:6;
u8 shutdown_temperature;
u8 cold_temperature;
u8 warning_temperature;
};
struct mac_address_s {
u8 mac_address[6];
};
struct mac_address_aligned_s {
struct mac_address_s aligned;
u16 rsvd;
};
struct sleep_proxy_s {
struct wake_on_lan_s {
u8 wake_on_magic_packet:1;
u8 wake_on_pattern:1;
u8 wake_on_link_up:1;
u8 wake_on_link_down:1;
u8 wake_on_ping:1;
u8 wake_on_timer:1;
u8 rsvd:2;
Annotation
- Immediate include surface: `aq_hw.h`.
- Detected declarations: `struct hw_atl2_txts_s`, `struct link_options_s`, `struct link_control_s`, `struct thermal_shutdown_s`, `struct mac_address_s`, `struct mac_address_aligned_s`, `struct sleep_proxy_s`, `struct wake_on_lan_s`, `struct __packed`, `struct __packed`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.