drivers/net/ethernet/atheros/atl1c/atl1c_main.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/atheros/atl1c/atl1c_main.c- Extension
.c- Size
- 81305 bytes
- Lines
- 2888
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
atl1c.h
Detected Declarations
struct atl1c_qregsstruct atl1c_platform_patchfunction atl1c_pcie_patchfunction atl1c_reset_pciefunction atl1c_irq_enablefunction atl1c_irq_disablefunction atl1c_wait_until_idlefunction atl1c_phy_configfunction atl1c_reinit_lockedfunction atl1c_check_link_statusfunction atl1c_link_chg_eventfunction atl1c_common_taskfunction atl1c_del_timerfunction atl1c_tx_timeoutfunction atl1c_set_multifunction __atl1c_vlan_modefunction atl1c_vlan_modefunction atl1c_restore_vlanfunction atl1c_set_mac_addrfunction atl1c_set_rxbufsizefunction atl1c_fix_featuresfunction atl1c_set_featuresfunction atl1c_set_max_mtufunction atl1c_change_mtufunction atl1c_mdio_readfunction atl1c_mdio_writefunction atl1c_mii_ioctlfunction atl1c_ioctlfunction atl1c_alloc_queuesfunction atl1c_get_mac_typefunction atl1c_setup_mac_funcsfunction atl1c_patch_assignfunction settingsfunction atl1c_clean_bufferfunction atl1c_clean_tx_ringfunction atl1c_clean_rx_ringfunction atl1c_init_ring_ptrsfunction atl1c_free_ring_resourcesfunction atl1c_setup_ring_resourcesfunction atl1c_configure_des_ringfunction atl1c_configure_txfunction atl1c_configure_rxfunction atl1c_configure_dmafunction atl1c_stop_macfunction atl1c_start_macfunction atl1c_reset_macfunction atl1c_disable_l0s_l1function atl1c_set_aspm
Annotated Snippet
static const struct net_device_ops atl1c_netdev_ops = {
.ndo_open = atl1c_open,
.ndo_stop = atl1c_close,
.ndo_validate_addr = eth_validate_addr,
.ndo_start_xmit = atl1c_xmit_frame,
.ndo_set_mac_address = atl1c_set_mac_addr,
.ndo_set_rx_mode = atl1c_set_multi,
.ndo_change_mtu = atl1c_change_mtu,
.ndo_fix_features = atl1c_fix_features,
.ndo_set_features = atl1c_set_features,
.ndo_eth_ioctl = atl1c_ioctl,
.ndo_tx_timeout = atl1c_tx_timeout,
.ndo_get_stats = atl1c_get_stats,
#ifdef CONFIG_NET_POLL_CONTROLLER
.ndo_poll_controller = atl1c_netpoll,
#endif
};
static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
{
SET_NETDEV_DEV(netdev, &pdev->dev);
pci_set_drvdata(pdev, netdev);
netdev->netdev_ops = &atl1c_netdev_ops;
netdev->watchdog_timeo = AT_TX_WATCHDOG;
netdev->min_mtu = ETH_ZLEN - (ETH_HLEN + VLAN_HLEN);
atl1c_set_ethtool_ops(netdev);
/* TODO: add when ready */
netdev->hw_features = NETIF_F_SG |
NETIF_F_HW_CSUM |
NETIF_F_HW_VLAN_CTAG_RX |
NETIF_F_TSO |
NETIF_F_TSO6;
netdev->features = netdev->hw_features |
NETIF_F_HW_VLAN_CTAG_TX;
return 0;
}
/**
* atl1c_probe - Device Initialization Routine
* @pdev: PCI device information struct
* @ent: entry in atl1c_pci_tbl
*
* Returns 0 on success, negative on failure
*
* atl1c_probe initializes an adapter identified by a pci_dev structure.
* The OS initialization, configuring of the adapter private structure,
* and a hardware reset occur.
*/
static int atl1c_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
{
struct net_device *netdev;
struct atl1c_adapter *adapter;
static int cards_found;
u8 __iomem *hw_addr;
enum atl1c_nic_type nic_type;
u32 queue_count = 1;
int err = 0;
int i;
/* enable device (incl. PCI PM wakeup and hotplug setup) */
err = pci_enable_device_mem(pdev);
if (err)
return dev_err_probe(&pdev->dev, err, "cannot enable PCI device\n");
/*
* The atl1c chip can DMA to 64-bit addresses, but it uses a single
* shared register for the high 32 bits, so only a single, aligned,
* 4 GB physical address range can be used at a time.
*
* Supporting 64-bit DMA on this hardware is more trouble than it's
* worth. It is far easier to limit to 32-bit DMA than update
* various kernel subsystems to support the mechanics required by a
* fixed-high-32-bit system.
*/
err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
if (err) {
dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
goto err_dma;
}
err = pci_request_regions(pdev, atl1c_driver_name);
if (err) {
dev_err(&pdev->dev, "cannot obtain PCI resources\n");
goto err_pci_reg;
}
pci_set_master(pdev);
Annotation
- Immediate include surface: `atl1c.h`.
- Detected declarations: `struct atl1c_qregs`, `struct atl1c_platform_patch`, `function atl1c_pcie_patch`, `function atl1c_reset_pcie`, `function atl1c_irq_enable`, `function atl1c_irq_disable`, `function atl1c_wait_until_idle`, `function atl1c_phy_config`, `function atl1c_reinit_locked`, `function atl1c_check_link_status`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: pattern implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.