drivers/net/ethernet/atheros/atl1e/atl1e_main.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/atheros/atl1e/atl1e_main.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/atheros/atl1e/atl1e_main.c- Extension
.c- Size
- 69968 bytes
- Lines
- 2567
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
atl1e.h
Detected Declarations
function atl1e_irq_enablefunction atl1e_irq_disablefunction atl1e_irq_resetfunction atl1e_phy_configfunction atl1e_reinit_lockedfunction atl1e_reset_taskfunction atl1e_check_linkfunction atl1e_link_chg_taskfunction atl1e_link_chg_eventfunction atl1e_del_timerfunction atl1e_cancel_workfunction atl1e_tx_timeoutfunction atl1e_set_multifunction __atl1e_rx_modefunction atl1e_rx_modefunction __atl1e_vlan_modefunction atl1e_vlan_modefunction atl1e_restore_vlanfunction atl1e_set_mac_addrfunction atl1e_fix_featuresfunction atl1e_set_featuresfunction atl1e_change_mtufunction atl1e_mdio_readfunction atl1e_mdio_writefunction atl1e_mii_ioctlfunction atl1e_ioctlfunction atl1e_setup_pcicmdfunction atl1e_alloc_queuesfunction settingsfunction atl1e_clean_tx_ringfunction atl1e_clean_rx_ringfunction atl1e_cal_ring_sizefunction atl1e_init_ring_resourcesfunction atl1e_init_ring_ptrsfunction atl1e_free_ring_resourcesfunction atl1e_setup_ring_resourcesfunction atl1e_configure_des_ringfunction atl1e_configure_txfunction atl1e_configure_rxfunction atl1e_configure_dmafunction atl1e_setup_mac_ctrlfunction atl1e_configurefunction atl1e_update_hw_statsfunction atl1e_clear_phy_intfunction atl1e_clean_tx_irqfunction atl1e_intrfunction atl1e_rx_checksumfunction atl1e_clean_rx_irq
Annotated Snippet
static const struct net_device_ops atl1e_netdev_ops = {
.ndo_open = atl1e_open,
.ndo_stop = atl1e_close,
.ndo_start_xmit = atl1e_xmit_frame,
.ndo_get_stats = atl1e_get_stats,
.ndo_set_rx_mode = atl1e_set_multi,
.ndo_validate_addr = eth_validate_addr,
.ndo_set_mac_address = atl1e_set_mac_addr,
.ndo_fix_features = atl1e_fix_features,
.ndo_set_features = atl1e_set_features,
.ndo_change_mtu = atl1e_change_mtu,
.ndo_eth_ioctl = atl1e_ioctl,
.ndo_tx_timeout = atl1e_tx_timeout,
#ifdef CONFIG_NET_POLL_CONTROLLER
.ndo_poll_controller = atl1e_netpoll,
#endif
};
static int atl1e_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
{
SET_NETDEV_DEV(netdev, &pdev->dev);
pci_set_drvdata(pdev, netdev);
netdev->netdev_ops = &atl1e_netdev_ops;
netdev->watchdog_timeo = AT_TX_WATCHDOG;
/* MTU range: 42 - 8170 */
netdev->min_mtu = ETH_ZLEN - (ETH_HLEN + VLAN_HLEN);
netdev->max_mtu = MAX_JUMBO_FRAME_SIZE -
(ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
atl1e_set_ethtool_ops(netdev);
netdev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_TSO |
NETIF_F_HW_VLAN_CTAG_RX;
netdev->features = netdev->hw_features | NETIF_F_HW_VLAN_CTAG_TX;
/* not enabled by default */
netdev->hw_features |= NETIF_F_RXALL | NETIF_F_RXFCS;
return 0;
}
/**
* atl1e_probe - Device Initialization Routine
* @pdev: PCI device information struct
* @ent: entry in atl1e_pci_tbl
*
* Returns 0 on success, negative on failure
*
* atl1e_probe initializes an adapter identified by a pci_dev structure.
* The OS initialization, configuring of the adapter private structure,
* and a hardware reset occur.
*/
static int atl1e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
{
struct net_device *netdev;
struct atl1e_adapter *adapter = NULL;
static int cards_found;
int err = 0;
err = pci_enable_device(pdev);
if (err)
return dev_err_probe(&pdev->dev, err, "cannot enable PCI device\n");
/*
* The atl1e chip can DMA to 64-bit addresses, but it uses a single
* shared register for the high 32 bits, so only a single, aligned,
* 4 GB physical address range can be used at a time.
*
* Supporting 64-bit DMA on this hardware is more trouble than it's
* worth. It is far easier to limit to 32-bit DMA than update
* various kernel subsystems to support the mechanics required by a
* fixed-high-32-bit system.
*/
err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
if (err) {
dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
goto err_dma;
}
err = pci_request_regions(pdev, atl1e_driver_name);
if (err) {
dev_err(&pdev->dev, "cannot obtain PCI resources\n");
goto err_pci_reg;
}
pci_set_master(pdev);
netdev = alloc_etherdev(sizeof(struct atl1e_adapter));
if (netdev == NULL) {
Annotation
- Immediate include surface: `atl1e.h`.
- Detected declarations: `function atl1e_irq_enable`, `function atl1e_irq_disable`, `function atl1e_irq_reset`, `function atl1e_phy_config`, `function atl1e_reinit_locked`, `function atl1e_reset_task`, `function atl1e_check_link`, `function atl1e_link_chg_task`, `function atl1e_link_chg_event`, `function atl1e_del_timer`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: pattern implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.