drivers/net/ethernet/broadcom/bnge/bnge_hw_def.h

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/broadcom/bnge/bnge_hw_def.h

File Facts

System: Linux kernel
Corpus path: drivers/net/ethernet/broadcom/bnge/bnge_hw_def.h
Extension: .h
Size: 17420 bytes
Lines: 447
Domain: Driver Families
Bucket: drivers/net
Inferred role: Driver Families: implementation source
Status: source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

No C-style include directives detected by the generator.

Detected Declarations

struct tx_bd_ext
struct rx_cmp
struct rx_cmp_ext
struct rx_agg_cmp
struct rx_tpa_start_cmp
struct rx_tpa_start_cmp_ext
struct rx_tpa_end_cmp
struct rx_tpa_end_cmp_ext

Annotated Snippet

struct tx_bd_ext {
	__le32 tx_bd_hsize_lflags;
	__le32 tx_bd_mss;
	__le32 tx_bd_cfa_action;
	__le32 tx_bd_cfa_meta;
};

#define TX_CMP_SQ_CONS_IDX(txcmp)					\
	(le32_to_cpu((txcmp)->sq_cons_idx) & TX_CMP_SQ_CONS_IDX_MASK)

#define RX_CMP_CMP_TYPE				GENMASK(5, 0)
#define RX_CMP_FLAGS_ERROR			BIT(6)
#define RX_CMP_FLAGS_PLACEMENT			GENMASK(9, 7)
#define RX_CMP_FLAGS_RSS_VALID			BIT(10)
#define RX_CMP_FLAGS_PKT_METADATA_PRESENT	BIT(11)
#define RX_CMP_FLAGS_ITYPES_SHIFT		12
#define RX_CMP_FLAGS_ITYPES_MASK		0xf000
#define RX_CMP_FLAGS_ITYPE_UNKNOWN		(0 << 12)
#define RX_CMP_FLAGS_ITYPE_IP			(1 << 12)
#define RX_CMP_FLAGS_ITYPE_TCP			(2 << 12)
#define RX_CMP_FLAGS_ITYPE_UDP			(3 << 12)
#define RX_CMP_FLAGS_ITYPE_FCOE			(4 << 12)
#define RX_CMP_FLAGS_ITYPE_ROCE			(5 << 12)
#define RX_CMP_FLAGS_ITYPE_PTP_WO_TS		(8 << 12)
#define RX_CMP_FLAGS_ITYPE_PTP_W_TS		(9 << 12)
#define RX_CMP_LEN				GENMASK(31, 16)
#define RX_CMP_LEN_SHIFT			16

#define RX_CMP_V1				BIT(0)
#define RX_CMP_AGG_BUFS				GENMASK(5, 1)
#define RX_CMP_AGG_BUFS_SHIFT			1
#define RX_CMP_RSS_HASH_TYPE			GENMASK(15, 9)
#define RX_CMP_RSS_HASH_TYPE_SHIFT		9
#define RX_CMP_V3_RSS_EXT_OP_LEGACY		GENMASK(15, 12)
#define RX_CMP_V3_RSS_EXT_OP_LEGACY_SHIFT	12
#define RX_CMP_V3_RSS_EXT_OP_NEW		GENMASK(11, 8)
#define RX_CMP_V3_RSS_EXT_OP_NEW_SHIFT		8
#define RX_CMP_PAYLOAD_OFFSET			GENMASK(23, 16)
#define RX_CMP_PAYLOAD_OFFSET_SHIFT		16
#define RX_CMP_SUB_NS_TS			GENMASK(19, 16)
#define RX_CMP_SUB_NS_TS_SHIFT			16
#define RX_CMP_METADATA1			GENMASK(31, 28)
#define RX_CMP_METADATA1_SHIFT			28
#define RX_CMP_METADATA1_TPID_SEL		GENMASK(30, 28)
#define RX_CMP_METADATA1_TPID_8021Q		BIT(28)
#define RX_CMP_METADATA1_TPID_8021AD		(0x0 << 28)
#define RX_CMP_METADATA1_VALID			BIT(31)

struct rx_cmp {
	__le32 rx_cmp_len_flags_type;
	u32 rx_cmp_opaque;
	__le32 rx_cmp_misc_v1;
	__le32 rx_cmp_rss_hash;
};

#define RX_CMP_FLAGS2_IP_CS_CALC			BIT(0)
#define RX_CMP_FLAGS2_L4_CS_CALC			BIT(1)
#define RX_CMP_FLAGS2_T_IP_CS_CALC			BIT(2)
#define RX_CMP_FLAGS2_T_L4_CS_CALC			BIT(3)
#define RX_CMP_FLAGS2_META_FORMAT_VLAN			BIT(4)

#define RX_CMP_FLAGS2_METADATA_TCI_MASK			GENMASK(15, 0)
#define RX_CMP_FLAGS2_METADATA_VID_MASK			GENMASK(11, 0)
#define RX_CMP_FLAGS2_METADATA_TPID_MASK		GENMASK(31, 16)
#define RX_CMP_FLAGS2_METADATA_TPID_SFT			16

#define RX_CMP_V					BIT(0)
#define RX_CMPL_ERRORS_MASK				GENMASK(15, 1)
#define RX_CMPL_ERRORS_SFT				1
#define RX_CMPL_ERRORS_BUFFER_ERROR_MASK		GENMASK(3, 1)
#define RX_CMPL_ERRORS_BUFFER_ERROR_NO_BUFFER		(0x0 << 1)
#define RX_CMPL_ERRORS_BUFFER_ERROR_DID_NOT_FIT		(0x1 << 1)
#define RX_CMPL_ERRORS_BUFFER_ERROR_NOT_ON_CHIP		(0x2 << 1)
#define RX_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT		(0x3 << 1)
#define RX_CMPL_ERRORS_IP_CS_ERROR			BIT(4)
#define RX_CMPL_ERRORS_L4_CS_ERROR			BIT(5)
#define RX_CMPL_ERRORS_T_IP_CS_ERROR			BIT(6)
#define RX_CMPL_ERRORS_T_L4_CS_ERROR			BIT(7)
#define RX_CMPL_ERRORS_CRC_ERROR			BIT(8)
#define RX_CMPL_ERRORS_T_PKT_ERROR_MASK			GENMASK(11, 9)
#define RX_CMPL_ERRORS_T_PKT_ERROR_NO_ERROR		(0x0 << 9)
#define RX_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_VERSION	(0x1 << 9)
#define RX_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_HDR_LEN	(0x2 << 9)
#define RX_CMPL_ERRORS_T_PKT_ERROR_TUNNEL_TOTAL_ERROR	(0x3 << 9)
#define RX_CMPL_ERRORS_T_PKT_ERROR_T_IP_TOTAL_ERROR	(0x4 << 9)
#define RX_CMPL_ERRORS_T_PKT_ERROR_T_UDP_TOTAL_ERROR	(0x5 << 9)
#define RX_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL		(0x6 << 9)
#define RX_CMPL_ERRORS_PKT_ERROR_MASK			GENMASK(15, 12)
#define RX_CMPL_ERRORS_PKT_ERROR_NO_ERROR		(0x0 << 12)
#define RX_CMPL_ERRORS_PKT_ERROR_L3_BAD_VERSION		(0x1 << 12)

Annotation

Detected declarations: `struct tx_bd_ext`, `struct rx_cmp`, `struct rx_cmp_ext`, `struct rx_agg_cmp`, `struct rx_tpa_start_cmp`, `struct rx_tpa_start_cmp_ext`, `struct rx_tpa_end_cmp`, `struct rx_tpa_end_cmp_ext`.
Atlas domain: Driver Families / drivers/net.
Implementation status: source implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.