drivers/net/ethernet/broadcom/bnx2.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/broadcom/bnx2.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/broadcom/bnx2.c- Extension
.c- Size
- 220024 bytes
- Lines
- 8812
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/module.hlinux/moduleparam.hlinux/stringify.hlinux/kernel.hlinux/timer.hlinux/errno.hlinux/ioport.hlinux/slab.hlinux/vmalloc.hlinux/interrupt.hlinux/pci.hlinux/netdevice.hlinux/etherdevice.hlinux/skbuff.hlinux/dma-mapping.hlinux/bitops.hasm/io.hasm/irq.hlinux/delay.hasm/byteorder.hasm/page.hlinux/time.hlinux/ethtool.hlinux/mii.hlinux/if.hlinux/if_vlan.hnet/ip.hnet/tcp.hnet/checksum.hlinux/workqueue.hlinux/crc32.hlinux/prefetch.h
Detected Declarations
function bnx2_tx_availfunction bnx2_reg_rd_indfunction bnx2_reg_wr_indfunction bnx2_shmem_wrfunction bnx2_shmem_rdfunction bnx2_ctx_wrfunction bnx2_drv_ctlfunction bnx2_setup_cnic_irq_infofunction bnx2_register_cnicfunction bnx2_unregister_cnicfunction bnx2_cnic_stopfunction bnx2_cnic_startfunction bnx2_cnic_stopfunction bnx2_write_phyfunction bnx2_disable_intfunction bnx2_enable_intfunction bnx2_disable_int_syncfunction bnx2_napi_disablefunction bnx2_napi_enablefunction bnx2_netif_stopfunction bnx2_netif_startfunction bnx2_free_tx_memfunction bnx2_free_rx_memfunction bnx2_alloc_tx_memfunction bnx2_alloc_rx_memfunction bnx2_free_stats_blkfunction bnx2_alloc_stats_blkfunction bnx2_free_memfunction bnx2_alloc_memfunction bnx2_report_fw_linkfunction bnx2_xceiver_strfunction bnx2_report_linkfunction bnx2_resolve_flow_ctrlfunction bnx2_5709s_linkupfunction bnx2_5708s_linkupfunction bnx2_5706s_linkupfunction bnx2_copper_linkupfunction bnx2_init_rx_contextfunction bnx2_init_all_rx_contextsfunction bnx2_set_mac_linkfunction bnx2_enable_bmsr1function bnx2_disable_bmsr1function bnx2_test_and_enable_2g5function bnx2_test_and_disable_2g5function bnx2_enable_forced_2g5function bnx2_disable_forced_2g5function bnx2_5706s_force_link_dnfunction bnx2_set_link
Annotated Snippet
static const struct net_device_ops bnx2_netdev_ops = {
.ndo_open = bnx2_open,
.ndo_start_xmit = bnx2_start_xmit,
.ndo_stop = bnx2_close,
.ndo_get_stats64 = bnx2_get_stats64,
.ndo_set_rx_mode = bnx2_set_rx_mode,
.ndo_eth_ioctl = bnx2_ioctl,
.ndo_validate_addr = eth_validate_addr,
.ndo_set_mac_address = bnx2_change_mac_addr,
.ndo_change_mtu = bnx2_change_mtu,
.ndo_set_features = bnx2_set_features,
.ndo_tx_timeout = bnx2_tx_timeout,
#ifdef CONFIG_NET_POLL_CONTROLLER
.ndo_poll_controller = poll_bnx2,
#endif
};
static int
bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
{
struct net_device *dev;
struct bnx2 *bp;
int rc;
char str[40];
/* dev zeroed in init_etherdev */
dev = alloc_etherdev_mq(sizeof(*bp), TX_MAX_RINGS);
if (!dev)
return -ENOMEM;
rc = bnx2_init_board(pdev, dev);
if (rc < 0)
goto err_free;
dev->netdev_ops = &bnx2_netdev_ops;
dev->watchdog_timeo = TX_TIMEOUT;
dev->ethtool_ops = &bnx2_ethtool_ops;
bp = netdev_priv(dev);
pci_set_drvdata(pdev, dev);
/*
* In-flight DMA from 1st kernel could continue going in kdump kernel.
* New io-page table has been created before bnx2 does reset at open stage.
* We have to wait for the in-flight DMA to complete to avoid it look up
* into the newly created io-page table.
*/
if (is_kdump_kernel())
bnx2_wait_dma_complete(bp);
eth_hw_addr_set(dev, bp->mac_addr);
dev->hw_features = NETIF_F_IP_CSUM | NETIF_F_SG |
NETIF_F_TSO | NETIF_F_TSO_ECN |
NETIF_F_RXHASH | NETIF_F_RXCSUM;
if (BNX2_CHIP(bp) == BNX2_CHIP_5709)
dev->hw_features |= NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
dev->vlan_features = dev->hw_features;
dev->hw_features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;
dev->features |= dev->hw_features;
dev->priv_flags |= IFF_UNICAST_FLT;
dev->min_mtu = MIN_ETHERNET_PACKET_SIZE;
dev->max_mtu = MAX_ETHERNET_JUMBO_PACKET_SIZE;
if (!(bp->flags & BNX2_FLAG_CAN_KEEP_VLAN))
dev->hw_features &= ~NETIF_F_HW_VLAN_CTAG_RX;
if ((rc = register_netdev(dev))) {
dev_err(&pdev->dev, "Cannot register net device\n");
goto error;
}
netdev_info(dev, "%s (%c%d) %s found at mem %lx, IRQ %d, "
"node addr %pM\n", board_info[ent->driver_data].name,
((BNX2_CHIP_ID(bp) & 0xf000) >> 12) + 'A',
((BNX2_CHIP_ID(bp) & 0x0ff0) >> 4),
bnx2_bus_string(bp, str), (long)pci_resource_start(pdev, 0),
pdev->irq, dev->dev_addr);
return 0;
error:
pci_iounmap(pdev, bp->regview);
pci_release_regions(pdev);
pci_disable_device(pdev);
err_free:
bnx2_free_stats_blk(dev);
Annotation
- Immediate include surface: `linux/module.h`, `linux/moduleparam.h`, `linux/stringify.h`, `linux/kernel.h`, `linux/timer.h`, `linux/errno.h`, `linux/ioport.h`, `linux/slab.h`.
- Detected declarations: `function bnx2_tx_avail`, `function bnx2_reg_rd_ind`, `function bnx2_reg_wr_ind`, `function bnx2_shmem_wr`, `function bnx2_shmem_rd`, `function bnx2_ctx_wr`, `function bnx2_drv_ctl`, `function bnx2_setup_cnic_irq_info`, `function bnx2_register_cnic`, `function bnx2_unregister_cnic`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: pattern implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.