drivers/net/ethernet/broadcom/bnx2x/bnx2x_self_test.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/broadcom/bnx2x/bnx2x_self_test.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/broadcom/bnx2x/bnx2x_self_test.c- Extension
.c- Size
- 90247 bytes
- Lines
- 3184
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/netdevice.hbnx2x.h
Detected Declarations
struct st_pred_argsstruct st_recordfunction peqfunction pneqfunction pand_neqfunction pand_neq_x2function pneq_errfunction pgtfunction pneq_r2function plt_sub_r2function pne_sub_r2function prsh_and_neqfunction peq_neq_r2function peq_neq_neq_r2function bnx2x_self_test_logfunction bnx2x_idle_chk6function bnx2x_idle_chk7function bnx2x_idle_chk
Annotated Snippet
struct st_pred_args {
u32 val1; /* value read from first register */
u32 val2; /* value read from second register, if applicable */
u32 imm1; /* 1st value in predicate condition, left-to-right */
u32 imm2; /* 2nd value in predicate condition, left-to-right */
u32 imm3; /* 3rd value in predicate condition, left-to-right */
u32 imm4; /* 4th value in predicate condition, left-to-right */
};
/* struct representing self test record - a single test */
struct st_record {
u8 chip_mask;
u8 macro;
u32 reg1;
u32 reg2;
u16 loop;
u16 incr;
int (*bnx2x_predicate)(struct st_pred_args *pred_args);
u32 reg3;
u8 severity;
char *fail_msg;
struct st_pred_args pred_args;
};
/* predicates for self test */
static int peq(struct st_pred_args *args)
{
return (args->val1 == args->imm1);
}
static int pneq(struct st_pred_args *args)
{
return (args->val1 != args->imm1);
}
static int pand_neq(struct st_pred_args *args)
{
return ((args->val1 & args->imm1) != args->imm2);
}
static int pand_neq_x2(struct st_pred_args *args)
{
return (((args->val1 & args->imm1) != args->imm2) &&
((args->val1 & args->imm3) != args->imm4));
}
static int pneq_err(struct st_pred_args *args)
{
return ((args->val1 != args->imm1) && (idle_chk_errors > args->imm2));
}
static int pgt(struct st_pred_args *args)
{
return (args->val1 > args->imm1);
}
static int pneq_r2(struct st_pred_args *args)
{
return (args->val1 != args->val2);
}
static int plt_sub_r2(struct st_pred_args *args)
{
return (args->val1 < (args->val2 - args->imm1));
}
static int pne_sub_r2(struct st_pred_args *args)
{
return (args->val1 != (args->val2 - args->imm1));
}
static int prsh_and_neq(struct st_pred_args *args)
{
return (((args->val1 >> args->imm1) & args->imm2) != args->imm3);
}
static int peq_neq_r2(struct st_pred_args *args)
{
return ((args->val1 == args->imm1) && (args->val2 != args->imm2));
}
static int peq_neq_neq_r2(struct st_pred_args *args)
{
return ((args->val1 == args->imm1) && (args->val2 != args->imm2) &&
(args->val2 != args->imm3));
}
/* struct holding the database of self test checks (registers and predicates) */
/* lines start from 2 since line 1 is heading in csv */
#define ST_DB_LINES 468
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/netdevice.h`, `bnx2x.h`.
- Detected declarations: `struct st_pred_args`, `struct st_record`, `function peq`, `function pneq`, `function pand_neq`, `function pand_neq_x2`, `function pneq_err`, `function pgt`, `function pneq_r2`, `function plt_sub_r2`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.