drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c- Extension
.c- Size
- 30040 bytes
- Lines
- 1171
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/errno.hlinux/pci.hlinux/netdevice.hlinux/etherdevice.hlinux/net_tstamp.hlinux/timekeeping.hlinux/ptp_classify.hlinux/clocksource.hlinux/bnxt/hsi.hbnxt.hbnxt_hwrm.hbnxt_ptp.h
Detected Declarations
function bnxt_ptp_cfg_settimefunction bnxt_ptp_parsefunction bnxt_ptp_settimefunction __bnxt_refclk_readfunction bnxt_refclk_readfunction bnxt_refclk_read_lowfunction bnxt_ptp_get_current_timefunction bnxt_hwrm_port_ts_queryfunction bnxt_ptp_gettimexfunction bnxt_ptp_update_current_timefunction bnxt_ptp_adjphcfunction bnxt_ptp_adjtimefunction bnxt_ptp_adjfine_rtcfunction bnxt_ptp_adjfinefunction bnxt_ptp_pps_eventfunction bnxt_ptp_cfg_pinfunction bnxt_ptp_cfg_eventfunction bnxt_ptp_cfg_tstamp_filtersfunction bnxt_ptp_reapply_ppsfunction bnxt_ptp_perout_cfgfunction bnxt_ptp_enablefunction bnxt_hwrm_ptp_cfgfunction bnxt_hwtstamp_setfunction bnxt_hwtstamp_getfunction bnxt_map_regsfunction bnxt_map_ptp_regsfunction bnxt_unmap_ptp_regsfunction bnxt_cc_readfunction bnxt_stamp_tx_skbfunction bnxt_ptp_ts_aux_workfunction bnxt_ptp_free_txts_skbsfunction bnxt_ptp_get_txts_prodfunction bnxt_get_tx_ts_p5function bnxt_get_rx_ts_p5function bnxt_tx_ts_cmpfunction bnxt_phc_get_syncdevicetimefunction bnxt_ptp_getcrosststampfunction bnxt_ptp_verifyfunction bnxt_ptp_pps_initfunction bnxt_pps_config_okfunction bnxt_ptp_timecounter_initfunction bnxt_ptp_rtc_timecounter_initfunction bnxt_ptp_init_rtcfunction bnxt_ptp_freefunction bnxt_ptp_initfunction bnxt_ptp_clear
Annotated Snippet
if (pps->pins[pin].state) {
rc = bnxt_ptp_cfg_pin(bp, pin, pps->pins[pin].usage);
if (!rc && pps->pins[pin].event)
rc = bnxt_ptp_cfg_event(bp,
pps->pins[pin].event);
if (rc)
netdev_err(bp->dev, "1PPS: Failed to configure pin%d\n",
pin);
}
}
}
static int bnxt_ptp_perout_cfg(struct bnxt_ptp_cfg *ptp,
struct ptp_clock_request *rq)
{
struct hwrm_func_ptp_cfg_input *req;
struct bnxt *bp = ptp->bp;
struct timespec64 ts;
u64 target_ns;
u16 enables;
int rc;
ts.tv_sec = rq->perout.start.sec;
ts.tv_nsec = rq->perout.start.nsec;
target_ns = timespec64_to_ns(&ts);
rc = hwrm_req_init(bp, req, HWRM_FUNC_PTP_CFG);
if (rc)
return rc;
enables = FUNC_PTP_CFG_REQ_ENABLES_PTP_FREQ_ADJ_EXT_PERIOD |
FUNC_PTP_CFG_REQ_ENABLES_PTP_FREQ_ADJ_EXT_UP |
FUNC_PTP_CFG_REQ_ENABLES_PTP_FREQ_ADJ_EXT_PHASE;
req->enables = cpu_to_le16(enables);
req->ptp_pps_event = 0;
req->ptp_freq_adj_dll_source = 0;
req->ptp_freq_adj_dll_phase = 0;
req->ptp_freq_adj_ext_period = cpu_to_le32(NSEC_PER_SEC);
req->ptp_freq_adj_ext_up = 0;
req->ptp_freq_adj_ext_phase_lower =
cpu_to_le32(lower_32_bits(target_ns));
req->ptp_freq_adj_ext_phase_upper =
cpu_to_le32(upper_32_bits(target_ns));
return hwrm_req_send(bp, req);
}
static int bnxt_ptp_enable(struct ptp_clock_info *ptp_info,
struct ptp_clock_request *rq, int on)
{
struct bnxt_ptp_cfg *ptp = container_of(ptp_info, struct bnxt_ptp_cfg,
ptp_info);
struct bnxt *bp = ptp->bp;
int pin_id;
int rc;
switch (rq->type) {
case PTP_CLK_REQ_EXTTS:
/* Configure an External PPS IN */
pin_id = ptp_find_pin(ptp->ptp_clock, PTP_PF_EXTTS,
rq->extts.index);
if (!TSIO_PIN_VALID(pin_id))
return -EOPNOTSUPP;
if (!on)
break;
rc = bnxt_ptp_cfg_pin(bp, pin_id, BNXT_PPS_PIN_PPS_IN);
if (rc)
return rc;
rc = bnxt_ptp_cfg_event(bp, BNXT_PPS_EVENT_EXTERNAL);
if (!rc)
ptp->pps_info.pins[pin_id].event = BNXT_PPS_EVENT_EXTERNAL;
return rc;
case PTP_CLK_REQ_PEROUT:
/* Configure a Periodic PPS OUT */
pin_id = ptp_find_pin(ptp->ptp_clock, PTP_PF_PEROUT,
rq->perout.index);
if (!TSIO_PIN_VALID(pin_id))
return -EOPNOTSUPP;
if (!on)
break;
rc = bnxt_ptp_cfg_pin(bp, pin_id, BNXT_PPS_PIN_PPS_OUT);
if (!rc)
rc = bnxt_ptp_perout_cfg(ptp, rq);
return rc;
case PTP_CLK_REQ_PPS:
/* Configure PHC PPS IN */
rc = bnxt_ptp_cfg_pin(bp, 0, BNXT_PPS_PIN_PPS_IN);
if (rc)
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/errno.h`, `linux/pci.h`, `linux/netdevice.h`, `linux/etherdevice.h`, `linux/net_tstamp.h`, `linux/timekeeping.h`, `linux/ptp_classify.h`.
- Detected declarations: `function bnxt_ptp_cfg_settime`, `function bnxt_ptp_parse`, `function bnxt_ptp_settime`, `function __bnxt_refclk_read`, `function bnxt_refclk_read`, `function bnxt_refclk_read_low`, `function bnxt_ptp_get_current_time`, `function bnxt_hwrm_port_ts_query`, `function bnxt_ptp_gettimex`, `function bnxt_ptp_update_current_time`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.