drivers/net/ethernet/broadcom/bnxt/bnxt_tc.h
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/broadcom/bnxt/bnxt_tc.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/broadcom/bnxt/bnxt_tc.h- Extension
.h- Size
- 6606 bytes
- Lines
- 256
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
net/ip_tunnels.h
Detected Declarations
struct bnxt_tc_l2_keystruct bnxt_tc_l3_keystruct bnxt_tc_l4_keystruct bnxt_tc_tunnel_keystruct bnxt_tc_actionsstruct bnxt_tc_flowstruct bnxt_tc_tunnel_nodestruct bnxt_tc_l2_nodestruct bnxt_tc_flow_nodefunction bnxt_tc_flower_enabledfunction bnxt_tc_setup_flowerfunction bnxt_init_tcfunction bnxt_shutdown_tc
Annotated Snippet
struct bnxt_tc_l2_key {
u8 dmac[ETH_ALEN];
u8 smac[ETH_ALEN];
__be16 inner_vlan_tpid;
__be16 inner_vlan_tci;
__be16 ether_type;
u8 num_vlans;
u8 dir;
#define BNXT_DIR_RX 1
#define BNXT_DIR_TX 0
};
struct bnxt_tc_l3_key {
union {
struct {
struct in_addr daddr;
struct in_addr saddr;
} ipv4;
struct {
struct in6_addr daddr;
struct in6_addr saddr;
} ipv6;
};
};
struct bnxt_tc_l4_key {
u8 ip_proto;
union {
struct {
__be16 sport;
__be16 dport;
} ports;
struct {
u8 type;
u8 code;
} icmp;
};
};
struct bnxt_tc_tunnel_key {
struct bnxt_tc_l2_key l2;
struct bnxt_tc_l3_key l3;
struct bnxt_tc_l4_key l4;
__be32 id;
};
#define bnxt_eth_addr_key_mask_invalid(eth_addr, eth_addr_mask) \
((is_wildcard(&(eth_addr)[0], ETH_ALEN) && \
is_wildcard(&(eth_addr)[ETH_ALEN / 2], ETH_ALEN)) || \
(is_wildcard(&(eth_addr_mask)[0], ETH_ALEN) && \
is_wildcard(&(eth_addr_mask)[ETH_ALEN / 2], ETH_ALEN)))
struct bnxt_tc_actions {
u32 flags;
#define BNXT_TC_ACTION_FLAG_FWD BIT(0)
#define BNXT_TC_ACTION_FLAG_FWD_VXLAN BIT(1)
#define BNXT_TC_ACTION_FLAG_PUSH_VLAN BIT(3)
#define BNXT_TC_ACTION_FLAG_POP_VLAN BIT(4)
#define BNXT_TC_ACTION_FLAG_DROP BIT(5)
#define BNXT_TC_ACTION_FLAG_TUNNEL_ENCAP BIT(6)
#define BNXT_TC_ACTION_FLAG_TUNNEL_DECAP BIT(7)
#define BNXT_TC_ACTION_FLAG_L2_REWRITE BIT(8)
#define BNXT_TC_ACTION_FLAG_NAT_XLATE BIT(9)
u16 dst_fid;
struct net_device *dst_dev;
__be16 push_vlan_tpid;
__be16 push_vlan_tci;
/* tunnel encap */
struct ip_tunnel_key tun_encap_key;
#define PEDIT_OFFSET_SMAC_LAST_4_BYTES 0x8
__be16 l2_rewrite_dmac[3];
__be16 l2_rewrite_smac[3];
struct {
bool src_xlate; /* true => translate src,
* false => translate dst
* Mutually exclusive, i.e cannot set both
*/
bool l3_is_ipv4; /* false means L3 is ipv6 */
struct bnxt_tc_l3_key l3;
struct bnxt_tc_l4_key l4;
} nat;
};
struct bnxt_tc_flow {
u32 flags;
#define BNXT_TC_FLOW_FLAGS_ETH_ADDRS BIT(1)
#define BNXT_TC_FLOW_FLAGS_IPV4_ADDRS BIT(2)
#define BNXT_TC_FLOW_FLAGS_IPV6_ADDRS BIT(3)
Annotation
- Immediate include surface: `net/ip_tunnels.h`.
- Detected declarations: `struct bnxt_tc_l2_key`, `struct bnxt_tc_l3_key`, `struct bnxt_tc_l4_key`, `struct bnxt_tc_tunnel_key`, `struct bnxt_tc_actions`, `struct bnxt_tc_flow`, `struct bnxt_tc_tunnel_node`, `struct bnxt_tc_l2_node`, `struct bnxt_tc_flow_node`, `function bnxt_tc_flower_enabled`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.