drivers/net/ethernet/broadcom/tg3.h
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/broadcom/tg3.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/broadcom/tg3.h- Extension
.h- Size
- 128393 bytes
- Lines
- 3453
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct tg3_tx_buffer_descstruct tg3_rx_buffer_descstruct tg3_ext_rx_buffer_descstruct tg3_internal_buffer_descstruct tg3_hw_statusstruct tg3_hw_statsstruct tg3_ocirstruct ring_infostruct tg3_tx_ring_infostruct tg3_link_configstruct tg3_bufmgr_configstruct tg3_ethtool_statsstruct tg3_rx_prodring_setstruct tg3_napistruct tg3_firmware_hdrstruct tg3enum TG3_FLAGS
Annotated Snippet
struct tg3_tx_buffer_desc {
u32 addr_hi;
u32 addr_lo;
u32 len_flags;
#define TXD_FLAG_TCPUDP_CSUM 0x0001
#define TXD_FLAG_IP_CSUM 0x0002
#define TXD_FLAG_END 0x0004
#define TXD_FLAG_IP_FRAG 0x0008
#define TXD_FLAG_JMB_PKT 0x0008
#define TXD_FLAG_IP_FRAG_END 0x0010
#define TXD_FLAG_HWTSTAMP 0x0020
#define TXD_FLAG_VLAN 0x0040
#define TXD_FLAG_COAL_NOW 0x0080
#define TXD_FLAG_CPU_PRE_DMA 0x0100
#define TXD_FLAG_CPU_POST_DMA 0x0200
#define TXD_FLAG_ADD_SRC_ADDR 0x1000
#define TXD_FLAG_CHOOSE_SRC_ADDR 0x6000
#define TXD_FLAG_NO_CRC 0x8000
#define TXD_LEN_SHIFT 16
u32 vlan_tag;
#define TXD_VLAN_TAG_SHIFT 0
#define TXD_MSS_SHIFT 16
};
#define TXD_ADDR 0x00UL /* 64-bit */
#define TXD_LEN_FLAGS 0x08UL /* 32-bit (upper 16-bits are len) */
#define TXD_VLAN_TAG 0x0cUL /* 32-bit (upper 16-bits are tag) */
#define TXD_SIZE 0x10UL
struct tg3_rx_buffer_desc {
u32 addr_hi;
u32 addr_lo;
u32 idx_len;
#define RXD_IDX_MASK 0xffff0000
#define RXD_IDX_SHIFT 16
#define RXD_LEN_MASK 0x0000ffff
#define RXD_LEN_SHIFT 0
u32 type_flags;
#define RXD_TYPE_SHIFT 16
#define RXD_FLAGS_SHIFT 0
#define RXD_FLAG_END 0x0004
#define RXD_FLAG_MINI 0x0800
#define RXD_FLAG_JUMBO 0x0020
#define RXD_FLAG_VLAN 0x0040
#define RXD_FLAG_ERROR 0x0400
#define RXD_FLAG_IP_CSUM 0x1000
#define RXD_FLAG_TCPUDP_CSUM 0x2000
#define RXD_FLAG_IS_TCP 0x4000
#define RXD_FLAG_PTPSTAT_MASK 0x0210
#define RXD_FLAG_PTPSTAT_PTPV1 0x0010
#define RXD_FLAG_PTPSTAT_PTPV2 0x0200
u32 ip_tcp_csum;
#define RXD_IPCSUM_MASK 0xffff0000
#define RXD_IPCSUM_SHIFT 16
#define RXD_TCPCSUM_MASK 0x0000ffff
#define RXD_TCPCSUM_SHIFT 0
u32 err_vlan;
#define RXD_VLAN_MASK 0x0000ffff
#define RXD_ERR_BAD_CRC 0x00010000
#define RXD_ERR_COLLISION 0x00020000
#define RXD_ERR_LINK_LOST 0x00040000
#define RXD_ERR_PHY_DECODE 0x00080000
#define RXD_ERR_ODD_NIBBLE_RCVD_MII 0x00100000
#define RXD_ERR_MAC_ABRT 0x00200000
#define RXD_ERR_TOO_SMALL 0x00400000
#define RXD_ERR_NO_RESOURCES 0x00800000
#define RXD_ERR_HUGE_FRAME 0x01000000
#define RXD_ERR_MASK (RXD_ERR_BAD_CRC | RXD_ERR_COLLISION | \
RXD_ERR_LINK_LOST | RXD_ERR_PHY_DECODE | \
RXD_ERR_MAC_ABRT | RXD_ERR_TOO_SMALL | \
RXD_ERR_NO_RESOURCES | RXD_ERR_HUGE_FRAME)
u32 reserved;
u32 opaque;
#define RXD_OPAQUE_INDEX_MASK 0x0000ffff
#define RXD_OPAQUE_INDEX_SHIFT 0
#define RXD_OPAQUE_RING_STD 0x00010000
#define RXD_OPAQUE_RING_JUMBO 0x00020000
#define RXD_OPAQUE_RING_MINI 0x00040000
#define RXD_OPAQUE_RING_MASK 0x00070000
Annotation
- Detected declarations: `struct tg3_tx_buffer_desc`, `struct tg3_rx_buffer_desc`, `struct tg3_ext_rx_buffer_desc`, `struct tg3_internal_buffer_desc`, `struct tg3_hw_status`, `struct tg3_hw_stats`, `struct tg3_ocir`, `struct ring_info`, `struct tg3_tx_ring_info`, `struct tg3_link_config`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.