drivers/net/ethernet/cavium/liquidio/octeon_nic.h
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/cavium/liquidio/octeon_nic.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/cavium/liquidio/octeon_nic.h- Extension
.h- Size
- 8010 bytes
- Lines
- 289
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct octnic_ctrl_pktstruct octnic_data_pktfunction octnet_iq_is_fullfunction octnet_prepare_pci_cmd_o2function octnet_prepare_pci_cmd_o3function octnet_prepare_pci_cmd
Annotated Snippet
struct octnic_ctrl_pkt {
/** Command to be passed to the Octeon device software. */
union octnet_cmd ncmd;
/** Send buffer */
void *data;
u64 dmadata;
/** Response buffer */
void *rdata;
u64 dmardata;
/** Additional data that may be needed by some commands. */
u64 udd[MAX_NCTRL_UDD];
/** Input queue to use to send this command. */
u64 iq_no;
/** The network device that issued the control command. */
u64 netpndev;
/** Callback function called when the command has been fetched */
octnic_ctrl_pkt_cb_fn_t cb_fn;
u32 sc_status;
};
#define MAX_UDD_SIZE(nctrl) (sizeof((nctrl)->udd))
/** Structure of data information passed by the NIC module to the OSI
* layer when forwarding data to Octeon device software.
*/
struct octnic_data_pkt {
/** Pointer to information maintained by NIC module for this packet. The
* OSI layer passes this as-is to the driver.
*/
void *buf;
/** Type of buffer passed in "buf" above. */
u32 reqtype;
/** Total data bytes to be transferred in this command. */
u32 datasize;
/** Command to be passed to the Octeon device software. */
union octeon_instr_64B cmd;
/** Input queue to use to send this command. */
u32 q_no;
};
/** Structure passed by NIC module to OSI layer to prepare a command to send
* network data to Octeon.
*/
union octnic_cmd_setup {
struct {
u32 iq_no:8;
u32 gather:1;
u32 timestamp:1;
u32 ip_csum:1;
u32 transport_csum:1;
u32 tnl_csum:1;
u32 rsvd:19;
union {
u32 datasize;
u32 gatherptrs;
} u;
} s;
u64 u64;
};
static inline int octnet_iq_is_full(struct octeon_device *oct, u32 q_no)
{
return ((u32)atomic_read(&oct->instr_queue[q_no]->instr_pending)
>= (oct->instr_queue[q_no]->max_count - 2));
}
static inline void
octnet_prepare_pci_cmd_o2(struct octeon_device *oct,
union octeon_instr_64B *cmd,
union octnic_cmd_setup *setup, u32 tag)
{
struct octeon_instr_ih2 *ih2;
struct octeon_instr_irh *irh;
union octnic_packet_params packet_params;
int port;
Annotation
- Detected declarations: `struct octnic_ctrl_pkt`, `struct octnic_data_pkt`, `function octnet_iq_is_full`, `function octnet_prepare_pci_cmd_o2`, `function octnet_prepare_pci_cmd_o3`, `function octnet_prepare_pci_cmd`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.