drivers/net/ethernet/cavium/octeon/octeon_mgmt.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/cavium/octeon/octeon_mgmt.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/cavium/octeon/octeon_mgmt.c- Extension
.c- Size
- 41905 bytes
- Lines
- 1559
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/platform_device.hlinux/dma-mapping.hlinux/etherdevice.hlinux/capability.hlinux/net_tstamp.hlinux/interrupt.hlinux/netdevice.hlinux/spinlock.hlinux/if_vlan.hlinux/of_mdio.hlinux/module.hlinux/of_net.hlinux/init.hlinux/slab.hlinux/phy.hlinux/io.hasm/octeon/octeon.hasm/octeon/cvmx-mixx-defs.hasm/octeon/cvmx-agl-defs.h
Detected Declarations
struct octeon_mgmtstruct octeon_mgmt_cam_statefunction octeon_mgmt_set_rx_irqfunction octeon_mgmt_set_tx_irqfunction octeon_mgmt_enable_rx_irqfunction octeon_mgmt_disable_rx_irqfunction octeon_mgmt_enable_tx_irqfunction octeon_mgmt_disable_tx_irqfunction ring_max_fillfunction ring_size_to_bytesfunction octeon_mgmt_rx_fill_ringfunction octeon_mgmt_clean_tx_buffersfunction octeon_mgmt_clean_tx_taskletfunction octeon_mgmt_update_rx_statsfunction octeon_mgmt_update_tx_statsfunction octeon_mgmt_dequeue_rx_bufferfunction octeon_mgmt_receive_onefunction octeon_mgmt_receive_packetsfunction octeon_mgmt_napi_pollfunction octeon_mgmt_reset_hwfunction octeon_mgmt_cam_state_addfunction octeon_mgmt_set_rx_filteringfunction octeon_mgmt_set_mac_addressfunction octeon_mgmt_change_mtufunction octeon_mgmt_interruptfunction octeon_mgmt_hwtstamp_setfunction octeon_mgmt_hwtstamp_getfunction octeon_mgmt_disable_linkfunction octeon_mgmt_enable_linkfunction octeon_mgmt_update_linkfunction octeon_mgmt_adjust_linkfunction octeon_mgmt_init_phyfunction octeon_mgmt_openfunction octeon_mgmt_stopfunction octeon_mgmt_xmitfunction octeon_mgmt_poll_controllerfunction octeon_mgmt_get_drvinfofunction octeon_mgmt_nway_resetfunction octeon_mgmt_probefunction octeon_mgmt_remove
Annotated Snippet
static const struct net_device_ops octeon_mgmt_ops = {
.ndo_open = octeon_mgmt_open,
.ndo_stop = octeon_mgmt_stop,
.ndo_start_xmit = octeon_mgmt_xmit,
.ndo_set_rx_mode = octeon_mgmt_set_rx_filtering,
.ndo_set_mac_address = octeon_mgmt_set_mac_address,
.ndo_eth_ioctl = phy_do_ioctl,
.ndo_change_mtu = octeon_mgmt_change_mtu,
#ifdef CONFIG_NET_POLL_CONTROLLER
.ndo_poll_controller = octeon_mgmt_poll_controller,
#endif
.ndo_hwtstamp_get = octeon_mgmt_hwtstamp_get,
.ndo_hwtstamp_set = octeon_mgmt_hwtstamp_set,
};
static int octeon_mgmt_probe(struct platform_device *pdev)
{
struct net_device *netdev;
struct octeon_mgmt *p;
const __be32 *data;
struct resource *res_mix;
struct resource *res_agl;
struct resource *res_agl_prt_ctl;
int len;
int result;
netdev = alloc_etherdev(sizeof(struct octeon_mgmt));
if (netdev == NULL)
return -ENOMEM;
SET_NETDEV_DEV(netdev, &pdev->dev);
platform_set_drvdata(pdev, netdev);
p = netdev_priv(netdev);
netif_napi_add_weight(netdev, &p->napi, octeon_mgmt_napi_poll,
OCTEON_MGMT_NAPI_WEIGHT);
p->netdev = netdev;
p->dev = &pdev->dev;
p->has_rx_tstamp = false;
data = of_get_property(pdev->dev.of_node, "cell-index", &len);
if (data && len == sizeof(*data)) {
p->port = be32_to_cpup(data);
} else {
dev_err(&pdev->dev, "no 'cell-index' property\n");
result = -ENXIO;
goto err;
}
snprintf(netdev->name, IFNAMSIZ, "mgmt%d", p->port);
result = platform_get_irq(pdev, 0);
if (result < 0)
goto err;
p->irq = result;
res_mix = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (res_mix == NULL) {
dev_err(&pdev->dev, "no 'reg' resource\n");
result = -ENXIO;
goto err;
}
res_agl = platform_get_resource(pdev, IORESOURCE_MEM, 1);
if (res_agl == NULL) {
dev_err(&pdev->dev, "no 'reg' resource\n");
result = -ENXIO;
goto err;
}
res_agl_prt_ctl = platform_get_resource(pdev, IORESOURCE_MEM, 3);
if (res_agl_prt_ctl == NULL) {
dev_err(&pdev->dev, "no 'reg' resource\n");
result = -ENXIO;
goto err;
}
p->mix_phys = res_mix->start;
p->mix_size = resource_size(res_mix);
p->agl_phys = res_agl->start;
p->agl_size = resource_size(res_agl);
p->agl_prt_ctl_phys = res_agl_prt_ctl->start;
p->agl_prt_ctl_size = resource_size(res_agl_prt_ctl);
if (!devm_request_mem_region(&pdev->dev, p->mix_phys, p->mix_size,
res_mix->name)) {
dev_err(&pdev->dev, "request_mem_region (%s) failed\n",
Annotation
- Immediate include surface: `linux/platform_device.h`, `linux/dma-mapping.h`, `linux/etherdevice.h`, `linux/capability.h`, `linux/net_tstamp.h`, `linux/interrupt.h`, `linux/netdevice.h`, `linux/spinlock.h`.
- Detected declarations: `struct octeon_mgmt`, `struct octeon_mgmt_cam_state`, `function octeon_mgmt_set_rx_irq`, `function octeon_mgmt_set_tx_irq`, `function octeon_mgmt_enable_rx_irq`, `function octeon_mgmt_disable_rx_irq`, `function octeon_mgmt_enable_tx_irq`, `function octeon_mgmt_disable_tx_irq`, `function ring_max_fill`, `function ring_size_to_bytes`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: pattern implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.