drivers/net/ethernet/chelsio/cxgb/cpl5_cmd.h
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/chelsio/cxgb/cpl5_cmd.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/chelsio/cxgb/cpl5_cmd.h- Extension
.h- Size
- 11751 bytes
- Lines
- 629
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
asm/byteorder.h
Detected Declarations
struct tcp_optionsstruct cpl_pass_open_reqstruct cpl_pass_open_rplstruct cpl_pass_establishstruct cpl_pass_accept_reqstruct cpl_pass_accept_rplstruct cpl_act_open_reqstruct cpl_act_open_rplstruct cpl_act_establishstruct cpl_get_tcbstruct cpl_get_tcb_rplstruct cpl_set_tcbstruct cpl_set_tcb_fieldstruct cpl_set_tcb_rplstruct cpl_pcmdstruct cpl_pcmd_readstruct cpl_pcmd_read_rplstruct cpl_close_con_reqstruct cpl_close_con_rplstruct cpl_close_listserv_reqstruct cpl_close_listserv_rplstruct cpl_abort_reqstruct cpl_abort_rplstruct cpl_peer_closestruct cpl_tx_datastruct cpl_tx_data_ackstruct cpl_rx_datastruct cpl_rx_data_ackstruct cpl_rx_data_ddpstruct cpl_tx_pktstruct cpl_tx_pkt_lsostruct cpl_rx_pktstruct cpl_l2t_write_reqstruct cpl_l2t_write_rplstruct cpl_l2t_read_reqstruct cpl_l2t_read_rplstruct cpl_smt_write_reqstruct cpl_smt_write_rplstruct cpl_smt_read_reqstruct cpl_smt_read_rplstruct cpl_rte_delete_reqstruct cpl_rte_delete_rplstruct cpl_rte_write_reqstruct cpl_rte_write_rplstruct cpl_rte_read_reqstruct cpl_rte_read_rplstruct cpl_mss_changeenum CPL_opcode
Annotated Snippet
struct tcp_options {
u16 mss;
u8 wsf;
#if defined(__LITTLE_ENDIAN_BITFIELD)
u8 rsvd:4;
u8 ecn:1;
u8 sack:1;
u8 tstamp:1;
#else
u8 tstamp:1;
u8 sack:1;
u8 ecn:1;
u8 rsvd:4;
#endif
};
struct cpl_pass_open_req {
union opcode_tid ot;
u16 local_port;
u16 peer_port;
u32 local_ip;
u32 peer_ip;
u32 opt0h;
u32 opt0l;
u32 peer_netmask;
u32 opt1;
};
struct cpl_pass_open_rpl {
union opcode_tid ot;
u16 local_port;
u16 peer_port;
u32 local_ip;
u32 peer_ip;
u8 resvd[7];
u8 status;
};
struct cpl_pass_establish {
union opcode_tid ot;
u16 local_port;
u16 peer_port;
u32 local_ip;
u32 peer_ip;
u32 tos_tid;
u8 l2t_idx;
u8 rsvd[3];
u32 snd_isn;
u32 rcv_isn;
};
struct cpl_pass_accept_req {
union opcode_tid ot;
u16 local_port;
u16 peer_port;
u32 local_ip;
u32 peer_ip;
u32 tos_tid;
struct tcp_options tcp_options;
u8 dst_mac[6];
u16 vlan_tag;
u8 src_mac[6];
u8 rsvd[2];
u32 rcv_isn;
u32 unknown_tcp_options;
};
struct cpl_pass_accept_rpl {
union opcode_tid ot;
u32 rsvd0;
u32 rsvd1;
u32 peer_ip;
u32 opt0h;
union {
u32 opt0l;
struct {
u8 rsvd[3];
u8 status;
};
};
};
struct cpl_act_open_req {
union opcode_tid ot;
u16 local_port;
u16 peer_port;
u32 local_ip;
u32 peer_ip;
u32 opt0h;
u32 opt0l;
Annotation
- Immediate include surface: `asm/byteorder.h`.
- Detected declarations: `struct tcp_options`, `struct cpl_pass_open_req`, `struct cpl_pass_open_rpl`, `struct cpl_pass_establish`, `struct cpl_pass_accept_req`, `struct cpl_pass_accept_rpl`, `struct cpl_act_open_req`, `struct cpl_act_open_rpl`, `struct cpl_act_establish`, `struct cpl_get_tcb`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.